TDA5235
Appendix
Register Description
FSK Noise Detector Configuration Register
A_NDCONFIG
Offset
045H
Reset Value
07H
FSK Noise Detector Configuration Register
ꢀ
ꢃ
ꢈ
ꢄ
ꢅ
ꢆ
ꢇ
ꢁ
1'56(/
1'6(/
1'7/
1'3'65
Z
Z
Z
Z
Field
Bits
Type
Description
NDRSEL
7:6
w
FSK Noise Detector Range Selection
00B 2^7
01B 2^6
10B 2^5
11B 2^4
Reset: 0H
NDSEL
5:4
w
Signal and Noise Detector Selection
00B Signal detection (=Squelch) only. This mode is recommended for
ASK.
01B Noise detection only
10B Signal and noise detection simultaneously
11B Signal and noise detection simultaneously, but the FSK noise
detect signal is valid only if the SIGDETLO threshold is exceeded.
This is the recommended mode for FSK.
Reset: 0H
NDTL
3:2
1:0
w
w
FSK Noise Detector Threshold Level
00B 1/2
01B 3/8
10B 1/4
11B 1/8
Reset: 1H
NDPDSR
FSK Noise Detector - Peak Detector Slew Rate
00B 1/256
01B 1/128
10B 1/64
11B 1/32
Reset: 3H
Clock and Data Recovery P Configuration Register
A_CDRP
Offset
Reset Value
E6H
Clock and Data Recovery P Configuration
Register
046H
Data Sheet
211
V1.0, 2010-02-19
INFINEON [ Infineon ]
