TDA5235
Appendix
Register Description
ꢀ
ꢁ
65&1&2
Z
Field
SRCNCO
Bits
Type
Description
7:0
w
Sample Rate Converter NCO Tune
Min 00h : Fout = Fin
Max FFh : Fout = Fin / 2
Reset: 00H
Externel Data Slicer Configuration
A_EXTSLC
Offset
03EH
Reset Value
02H
Externel Data Slicer Configuration
ꢀ
ꢃ
ꢈ
ꢄ
ꢅ
ꢆ
ꢁ
8186('
5HV
(6/&6&$
(6/&%:
ꢂ
Z
Z
Field
Bits
Type
Description
UNUSED
7
-
UNUSED
Reset: 0H
ESLCSCA
4:3
w
External Slicer BW Selection Scaling
00B 1/2
01B 1/4
10B 1/8
11B 1/16
Reset: 0H
ESLCBW
2:0
w
External Slicer Manual BW Selection
000B 1/8
001B 1/16
010B 1/24
011B 1/32
100B 1/40
101B 1/48
110B n.u.
111B n.u.
Reset: 2H
Signal Detector Threshold Level Register - Run Mode
Data Sheet
207
V1.0, 2010-02-19
INFINEON [ Infineon ]
