TDA5235
Appendix
Register Description
AGC Configuration Register 1
A_AGCCFG1
Offset
034H
Reset Value
03H
AGC Configuration Register 1
ꢀ
ꢆ
ꢇ
ꢁ
8186('
$*&7+2))6
ꢂ
Z
Field
Bits
Type
Description
UNUSED
7:2
-
UNUSED
Reset: 00H
AGCTHOFFS 1:0
w
AGC Threshold Offset
00B 25.5 dB
01B 38.3 dB
10B 51.1 dB
11B 63.9 dB
Reset: 3H
AGC Threshold Register
A_AGCTHR
Offset
035H
Reset Value
08H
AGC Threshold Register
ꢀ
ꢄ
ꢅ
ꢁ
$*&783
$*&7/2
Z
Z
Field
Bits
Type
Description
AGCTUP
7:4
w
AGC Upper Attack Threshold [dB]
AGC Upper Threshold = A_AGCCFG1.AGCTHOFFS + 25.6 +
AGCTUP*1.6
Reset: 0H
AGCTLO
3:0
w
AGC Lower Attack Threshold [dB]
AGC Lower Threshold = A_AGCCFG1.AGCTHOFFS + AGCTLO*1.6
Reset: 8H
Digital Receiver Configuration Register
Data Sheet
202
V1.0, 2010-02-19
INFINEON [ Infineon ]
