TDA5235
Appendix
Register Overview
Table 1
Register Overview (cont’d)
Register Short Name
B_TOTIM_TSI
B_TOTIM_EOM
B_AFCLIMIT
B_AFCAGCD
B_AFCSFCFG
B_AFCK1CFG0
B_AFCK1CFG1
B_AFCK2CFG0
B_AFCK2CFG1
B_PMFUDSF
B_AGCSFCFG
B_AGCCFG0
B_AGCCFG1
B_AGCTHR
Register Long Name
Offset Address Page Number
TSI Timeout Timer Register
128H
129H
12AH
12BH
12CH
12DH
12EH
12FH
130H
131H
132H
133H
134H
135H
136H
137H
138H
139H
13AH
13BH
13CH
13DH
13EH
13FH
EOM Timeout Timer Register
AFC Limit Configuration Register
AFC/AGC Freeze Delay Register
AFC Start/Freeze Configuration Register
AFC Integrator 1 Gain Register 0
AFC Integrator 1 Gain Register 1
AFC Integrator 2 Gain Register 0
AFC Integrator 2 Gain Register 1
Peak Memory Filter Up-Down Factor Register
AGC Start/Freeze Configuration Register
AGC Configuration Register 0
AGC Configuration Register 1
AGC Threshold Register
B_DIGRXC
Digital Receiver Configuration Register
RSSI Peak Detector Bit Position Register
Image Supression Fc Selection Register
Pre Decimation Factor Register
Pre Decimation Scaling Register FSK Mode
Pre Decimation Scaling Register ASK Mode
Matched Filter Control Register
B_PKBITPOS
B_ISUPFCSEL
B_PDECF
B_PDECSCFSK
B_PDECSCASK
B_MFC
B_SRC
Sampe Rate Converter NCO Tune
Externel Data Slicer Configuration
B_EXTSLC
B_SIGDET0
Signal Detector Threshold Level Register - Run
Mode
B_SIGDET1
Signal Detector Threshold Level Register -
Wakeup
140H
B_SIGDETLO
B_SIGDETSEL
B_SIGDETCFG
B_NDTHRES
B_NDCONFIG
B_CDRP
Signal Detector Threshold Low Level Register
Signal Detector Range Selection Register
Signal Detector Configuration Register
FSK Noise Detector Threshold Register
FSK Noise Detector Configuration Register
141H
142H
143H
144H
145H
146H
Clock and Data Recovery P Configuration
Register
B_CDRI
Clock and Data Recovery Configuration Register 147H
B_CDRRI
Clock and Data Recovery RUNIN Configuration
Register
148H
B_CDRTOLC
B_CDRTOLB
CDR DC Chip Tolerance Register
CDR DC Bit Tolerance Register
149H
14AH
Data Sheet
171
V1.0, 2010-02-19
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