TC1796
Functional Description
Note: Although the polynomial above is used for generation, the generation algorithm
differs from the one that is used by the Ethernet protocol.
3.8
Interrupt System
The TC1796 interrupt system provides a flexible and time-efficient means for processing
interrupts. An interrupt request can be serviced either by the CPU or by the Peripheral
Control Processor (PCP). These units are called “Service Providers”. Interrupt requests
are called “Service Requests” rather than “Interrupt Requests” in this document because
they can be serviced by either of the Service Providers.
Each peripheral in the TC1796 can generate service requests. Additionally, the Bus
Control Units, the Debug Unit, the PCP, and even the CPU itself can generate service
requests to either of the two Service Providers.
As shown in Figure 7, each TC1796 unit that can generate service requests is
connected to one or more Service Request Nodes (SRN). Each SRN contains a Service
Request Control Register. Two arbitration buses connect the SRNs with two Interrupt
Control Units, which handle interrupt arbitration among competing interrupt service
requests, as follows:
•
The Interrupt Control Unit (ICU) arbitrates service requests for the CPU and
administers the CPU Interrupt Arbitration Bus.
•
The Peripheral Interrupt Control Unit (PICU) arbitrates service requests for the PCP2
and administers the PCP2 Interrupt Arbitration Bus.
The PCP2 can make service requests directly to itself (via the PICU), or it can make
service requests to the CPU. The Debug Unit can generate service requests to the PCP2
or the CPU. The CPU can make service requests directly to itself (via the ICU), or it can
make service requests to the PCP. The CPU Service Request Nodes are activated
through software.
Depending on the selected system clock frequency fSYS, the number of fSYS clock cycles
per arbitration cycle must be selected as follows:
• fSYS < 60MHz: ICR.CONECYC = 1 and PCP_ICR.CONECYC = 1
• fSYS > 60MHz: ICR.CONECYC = 0 and PCP_ICR.CONECYC = 0
Data Sheet
46
V1.0, 2008-04
INFINEON [ Infineon ]
