TC1796
Electrical Parameters
4.3.11
EBU Arbitration Signal Timing
VSS = 0 V;VDD = 1.5 V ± 5%; VDDEBU = 2.5 V ± 5% and 3.3 V ± 5%, Class B pins;
TA = -40°C to +125 °C; CL = 35 pF;
Table 31
EBU Arbitration Signal Timing Parameters1)
Parameter
Symbol
Values
Typ. Max.
Unit Note /
Test Con
Min.
dition
Output delay from CLKOUT
rising edge
Data setup to CLKOUT
falling edge
Data hold from CLKOUT
falling edge
t27
t28
t29
CC –
–
–
–
3
–
–
ns
ns
ns
–
SR 8
SR 2
–
–
1) Not subject to production test, verified by design/characterization.
BFCLKO
t27
t27
HLDA Output
t27
t27
BREQ Output
BFCLKO
t28
t29
t28
t29
HOLD Input
HLDA Input
EBUArb_1
Figure 41
EBU Arbitration Signal Timing
Data Sheet
125
V1.0, 2008-04
INFINEON [ Infineon ]
