TC39x BC/BD-Step
Pin Definition and Functions: LFBGA-516 Package Variant Pin Configuration
Table 2-9 Port 15 Functions (cont’d)
Ball
Symbol
Ctrl. Buffer
Type
Function
J20
P15.7
I
FAST /
PU1 /
VEXT /
ES
General-purpose input
Mux input channel 1 of TIM module 1
Mux input channel 1 of TIM module 0
Receive input
GTM_TIM1_IN1_5
GTM_TIM0_IN1_5
ASCLIN3_ARXA
QSPI2_MRSTB
P15.7
Master SPI data input
General-purpose output
GTM muxed output
Transmit output
O0
O1
O2
GTM_TOUT78
ASCLIN3_ATX
IOM_MON2_15
IOM_REF2_15
QSPI2_MRST
IOM_MON2_2
IOM_REF2_2
—
Monitor input 2
Reference input 2
O3
Slave SPI data output
Monitor input 2
Reference input 2
O4
O5
O6
O7
Reserved
—
Reserved
—
Reserved
CCU60_COUT60
IOM_MON1_3
IOM_REF1_3
P15.8
T12 PWM channel 60
Monitor input 1
Reference input 1
J19
I
FAST /
PU1 /
VEXT /
ES
General-purpose input
Mux input channel 2 of TIM module 1
Mux input channel 2 of TIM module 0
Slave SPI clock inputs
GTM_TIM1_IN2_5
GTM_TIM0_IN2_5
QSPI2_SCLKB
SCU_E_REQ5_0
ERU Channel 5 inputs 0 to 5 (0 is the LSB and 5 is the
MSB)
P15.8
O0
O1
O2
O3
O4
O5
O6
O7
General-purpose output
GTM muxed output
Reserved
GTM_TOUT79
—
QSPI2_SCLK
—
Master SPI clock output
Reserved
—
Reserved
ASCLIN3_ASCLK
CCU60_COUT61
IOM_MON1_4
IOM_REF1_2
Shift clock output
T12 PWM channel 61
Monitor input 1
Reference input 1
Data Sheet
86
V 1.2, 2021-03
OPEN MARKET VERSION