TC39x BC/BD-Step
Pin Definition and Functions: LFBGA-516 Package Variant Pin Configuration
Table 2-9 Port 15 Functions (cont’d)
Ball
Symbol
Ctrl. Buffer
Type
Function
H24
P15.2
I
FAST /
PU1 /
VEXT /
ES
General-purpose input
Mux input channel 5 of TIM module 3
Mux input channel 5 of TIM module 2
Slave select input
GTM_TIM3_IN5_4
GTM_TIM2_IN5_4
QSPI2_SLSIA
SENT_SENT10D
QSPI2_MRSTE
QSPI2_HSICINA
P15.2
Receive input channel 10
Master SPI data input
Highspeed capture channel
General-purpose output
GTM muxed output
Transmit output
O0
O1
O2
GTM_TOUT73
ASCLIN0_ATX
IOM_MON2_12
IOM_REF2_12
QSPI2_SLSO0
—
Monitor input 2
Reference input 2
O3
O4
O5
Master slave select output
Reserved
CAN01_TXD
IOM_MON2_6
IOM_REF2_6
ASCLIN0_ASCLK
—
CAN transmit output node 1
Monitor input 2
Reference input 2
O6
O7
I
Shift clock output
Reserved
G22
P15.3
FAST /
PU1 /
VEXT /
ES
General-purpose input
Mux input channel 6 of TIM module 3
Mux input channel 6 of TIM module 2
CAN receive input node 1
Receive input
GTM_TIM3_IN6_4
GTM_TIM2_IN6_4
CAN01_RXDA
ASCLIN0_ARXB
QSPI2_SCLKA
QSPI2_HSICINB
SDMMC0_CMD_IN
P15.3
Slave SPI clock inputs
Highspeed capture channel
command in
O0
O1
O2
General-purpose output
GTM muxed output
Transmit output
GTM_TOUT74
ASCLIN0_ATX
IOM_MON2_12
IOM_REF2_12
QSPI2_SCLK
—
Monitor input 2
Reference input 2
O3
O4
O5
O6
O7
O
Master SPI clock output
Reserved
MSC0_EN1
—
Chip Select
Reserved
—
Reserved
SDMMC0_CMD
command out
Data Sheet
83
V 1.2, 2021-03
OPEN MARKET VERSION