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SAK-TC399XP-256F300S BC 参数 Datasheet PDF下载

SAK-TC399XP-256F300S BC图片预览
型号: SAK-TC399XP-256F300S BC
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内容描述: [Infineon releases its second generation AURIX microcontroller in embedded flash 40 nm technology. It comes back with an increase in performance, memory sizes, connectivity and more scalability to address the new automotive trends and challenges. This family has more than 20 products to provide the most scalable portfolio of safety microcontrol­ler. In terms of performance, the highest end product TC39x offers 6 cores running at 300 MHz and up to 6.9 MBytes embedded RAM, and consuming below 2 W. ]
分类和应用:
文件页数/大小: 548 页 / 21256 K
品牌: INFINEON [ Infineon ]
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TC39x BC/BD-Step  
Electrical SpecificationPower Supply Current  
4) A single DS channel instance consumes 4 mA.  
5) EVADC current is limited to 3mA in "ADAS power pattern with 2 EVADC" at (IDDM).  
6) A single VADC unit consumes 1.3 mA.  
7) If SCR ADCOMP is activated, an additional 0.6 mA adder is to be considered.  
8) Limits are defined for real power pattern (VDD=1.275V). For max power pattern limit has to be multiplied by the factor 1.22.  
Table 3-29 Module Core Current Consumption  
Parameter  
Symbol  
Values  
Typ.  
Unit  
Note / Test Condition  
Min.  
Max.  
I
DD core current of CPUx main  
I
I
DDCx0 CC  
-
-
-
-
-
70  
mA  
mA  
mA  
mA  
max power pattern;  
IPC=1.2  
core with CPUx lockstep core  
inactive  
-
-
-
45  
real power pattern;  
IPC=0.6  
I
DD core current of CPUx main  
DDCxx CC  
IDDCx0  
50  
+
+
max power pattern;  
IPC=1.2  
core with CPUx lockstep core  
active  
IDDCx0  
40  
real power pattern;  
IPC=0.6  
I
DD core current added by GTM IDDGTM CC  
-
-
-
-
160  
130  
mA  
mA  
max power pattern  
real power pattern;  
TIMx, TOMx, ATOMx ,  
MCSx active. 3 clusters  
at 200 MHz.  
-
-
60  
mA  
TIMx, TOMx active at  
100MHz. ATOMx ,  
MCSx, DPLL inactive. 2  
clusters at 100 MHz.  
I
I
DD core current added by HSM IDDHSM CC  
DD core current added by SPU IDDSPU1 CC  
-
-
-
-
20 1)  
mA  
mA  
max power pattern;  
HSM running at  
100MHz.  
360 2)  
CTRL.DIV = 00; SPU  
@ 300 MHz; FFT  
length 2048;  
DATSRC=EMEM;  
complex windowing  
I
I
DD core current added by SPU IDDSPU2 CC  
-
-
-
-
310 2)  
mA  
mA  
CTRL.DIV = 00; SPU  
@ 300 MHz; FFT  
length 512;  
DATSRC=EMEM;  
complex windowing  
DD core dynamic current load  
IDDSPULJ1  
390 3)  
CTRL.DIV = 00; SPU  
@ 300 MHz; FFT  
length 2048;  
jump during IDDSPU1 pattern. CC  
DATSRC=EMEM;  
complex windowing  
Data Sheet  
451  
V 1.2, 2021-03  
OPEN MARKET VERSION  
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