PEB 2091
PEF 2091
Register Description
5.2.9
CIRI-Register
Read
Address D
H
The Read C/I-code from IOM®-2 Register (CIRI) reads the C/I-code from the IOM®-2
interface.
Reset value: 03H
7
6
5
4
3
2
1
0
C/I
C/I
C/I
C/I
C/I
C/I
7., 6. bits ADF2:TE1 = 1 indicates that the C/I-channel 1 in the TE mode can be
accessed and that the C/I-channel on IOM®-2-channel 0 is passed
transparently from the transceiver core to the IOM®-2. The two bits contain
C/I-code
ADF2:TE1 = 0 sets the normal mode. The two bits are set to "0"
5.-2. bits
1., 0. bits Set to "1"
Contain the C/I-command coming from the IOM®-2
5.2.10
CIWI-Register
Write
Address D
H
The Write C/I-code to IOM®-2 Register (CIWI) writes the C/I-code to the IOM®-2
interface.
Reset value: C7H
7
6
5
4
3
2
1
1
0
1
C/I
C/I
C/I
C/I
C/I
C/I
7., 6. bits These bits are the MSBs of the 6-bit wide C/I code in IOM®-2 channel 1 if
ADF2:TE1 = 1.
If ADF2:TE1 = 0 these two bits have no effect. They should however be set
to 1 for future compatibility
5.-2. bits
Contain the C/I-code going to the IOM®-2
1., 0. bits Set to "1"
Semiconductor Group
218
Data Sheet 01.99
INFINEON [ Infineon ]
