Functional Description
Table 5
TEM/PFS Function Table
TEM
PFS
Effect
0
0
1
1
0
1
1
0
No pre-filter (0 delay)
Pre-filter delay compensation 520 ns
Pre-filter delay compensation 910 ns
Test mode (layer-1 disabled)
This delay compensation might be necessary in order to comply with the "total phase deviation
input to output" requirement of CCITT recommendation I.430 which specifies a phase
deviation in the range of – 7% to + 15% of a bit period.
2.5.3.2 External Protection Circuitry
The CCITT specification for both transmitter and receiver impedances in TEs results in a
conflict with respect to external S -protection circuitry requirements:
0
• To avoid destruction or malfunctioning of the S -device it is desirable to drain off even small
0
overvoltages reliably.
• To meet the 96 kHz impedance test specified for transmitters and receivers (for TEs only,
CCITT sections 8.5.1.2a and 8.6.1.1) the protection circuit must be dimensioned such that
voltages below 2.4 V are not affected (1.2 V CCITT amplitude x transformer ratio 1:2).
This requirement results from the fact that this test is to be performed with no supply voltage
being connected to the TE. Therefore the second reference point for overvoltages VDD, is
tied to GND. Then, if the amplitude of the 96 kHz test signal is greater than the combined
forward voltages of the diodes, a current exceeding the specified one may pass the
protection circuit.
The following recommendations aim at achieving the highest possible device protection
against overvoltages while still fulfilling the 96 kHz impedance tests.
Depending on transformer and circuit layout, it may become necessary to rise the threshold
voltage slightly.
If the device is not used in TE applications, the Zener diodes should be replaced by standard
diodes.
Semiconductor Group
85
INFINEON [ Infineon ]
