Electrical Characteristics
Table 27
Parameter
Symbol
Limit Values
Unit
Conditions
min.
max.
20
Bit clock delay
t
t
t
t
t
t
BCD
SDD
SBD
DCD
FCP
FSD
– 20
ns
ns
ns
ns
ns
ns
IOM-2
IOM-2
IOM-2
IOM-1
IOM-1
IOM-1
SDS1/2 delay from DCL
SDS1/2 delay from BCL
DCL delay from CP
120
120
50
0
FSC1/2 delay from CP
FSC1/2 delay from DCL
0
50
– 20
20
Tables 29 to 33 give the timing characteristics of the clocks.
3.5 V
0.8 V
t WH
t WL
ITT00723
t P
Figure 103
Definition of Clock Period and Width
Table 28
DCL Clock Characteristics (IOM®-1)
Parameter
Symbol
Limit Values
Unit
Test Condition
min.
1822
470
typ.
max.
(TE) 512 kHz
t
t
t
t
t
t
PO
1953
651
2084
832
ns
ns
ns
ns
ns
ns
osc ± 100 ppm
osc ± 100 ppm
osc ± 100 ppm
(TE) 512 kHz 1:2
(TE) 512 kHz 1:2
(NT, LT-S, LT-T)
(NT, LT-S, LT-T)
(NT, LT-S, LT-T)
WHO
WLO
PI
1121
1853
200
1302
1483
2053
WHI
WLI
200
Semiconductor Group
262