Electrical Characteristics
That means that the output jitter will not exceed 130 ns pp. In the intermediate range of jitter
frequency, the degree of jitter attenuation lies between zero and the maximum (see
figure 105).
7.68 MHz
1.536 MHz
Divider
: 5 ± 1
Divider
: 8
192 kHz
Lead
Lag
Up
512 kHz
Up/Down
Counter
Phase
Detector
Divider
: 3
Down
DCL 512 kHz
DCL (IOM R -1 Mode)
DCL : 8 (IOM R -2 Mode)
ITS02394
Figure 104
Block Diagram of XPLL
Attenuation
40
dB
20
0
Sinusoidal
Jitter Frequency
1 Hz
10 Hz
100 Hz
1 kHz
10 kHz
100 kHz
1 MHz
25 kHz
ITD02395
Figure 105
Jitter Transfer Curve of XPLL
Semiconductor Group
265