AN985B/BX
Registers and Descriptors Description
Field
OWN
Bits
31
Type
rw
Description
Own Bit
0B
1B
, Host does not move the receiving data out yet
, indicate the new receiving data can be put into this descriptor
FL
30:16
15
rw
rw
Frame Length, Including CRC
This field is valid only in last descriptor
ES
Error Summary, OR of the Following Bit
This field is valid only in last descriptor.
0: overflow
1: CRC error
6: late collision
7: frame too long
11: runt packet
14: descriptor error
DE
DT
14
rw
rw
Descriptor Error
This bit is valid only in last descriptor
1B
, the current receiving packet is not able to put into the current valid
descriptor. This packet is truncated
13:12
Data Type
These bits are valid only in last descriptor
00B , normal
01B , MAC loop-back
10B , Transceiver loop-back
11B , remote loop-back
RF
MF
11
10
rw
rw
Runt Frame (packet length < 64 bytes)
This bit is valid only in last descriptor.
Multicast Frame
This bit is valid only in last descriptor.
FS
LS
TL
9
8
7
rw
rw
rw
First Descriptor
Last Descriptor
Too Long Packet (packet length > 1518 bytes)
This bit is valid only in last descriptor.
CS
FT
6
5
rw
rw
Late Collision
Set when collision is active after 64 bytes. This bit is valid only in last
descriptor.
Frame Type
This bit is valid only in last descriptor.
0B
1B
, 802.3 type
, Ethernet type
RW
4
rw
Receive Watchdog (refer to CSR15, bit 4)
This bit is valid only in last descriptor.
Res
DB
3
2
ro
rw
Reserved
Dribble Bit
This bit is valid only in last descriptor.
ECPacket length is not integer multiple of 8-bit.
CE
1
rw
CRC Error
This bit is valid only in last descriptor.
Data Sheet
95
Rev. 1.51, 2005-11-30
INFINEON [ Infineon ]
