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ICS932SQ420DGLF 参数 Datasheet PDF下载

ICS932SQ420DGLF图片预览
型号: ICS932SQ420DGLF
PDF下载: 下载PDF文件 查看货源
内容描述: 第二代PCIe 2/3和QPI时钟的Romley的服务器 [PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS]
分类和应用: PC服务器时钟
文件页数/大小: 27 页 / 412 K
品牌: IDT [ INTEGRATED DEVICE TECHNOLOGY ]
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932SQ420D  
PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS  
Pin Descriptions - 64 MLF  
PIN #  
PIN NAME  
TYPE  
DESCRIPTION  
1
2
3
4
5
6
7
8
9
GNDPCI  
PWR Ground pin for PCI outputs and logic.  
PWR 3.3V power for the PCI outputs and logic  
OUT 3.3V PCI clock output  
OUT 3.3V PCI clock output  
OUT 3.3V PCI clock output  
OUT 3.3V PCI clock output  
OUT 3.3V PCI clock output  
PWR Ground pin for PCI outputs and logic.  
PWR 3.3V power for the PCI outputs and logic  
PWR 3.3V power for the 48MHz output and logic  
VDDPCI  
PCI4_2x  
PCI3_2x  
PCI2_2x  
PCI1_2x  
PCI0_2x  
GNDPCI  
VDDPCI  
10 VDD48  
3.3V 48MHz output/ 3.3V tolerant CPU frequency select latched input pin. See VilFS and VihFS values for  
11 ^48M_2x/100M_133M#  
I/O thresholds. This pin has a weak (~120Kom) internal pull up.  
1 = 100MHz, 0 = 133MHz operating frequency  
PWR Ground pin for 48MHz output and logic.  
PWR Ground pin for DOT96 output and logic.  
12 GND48  
13 GND96  
True clock of differential 96MHz output. These are current mode outputs. These are current mode outputs  
and external 33 ohm series resistors and 49.9 ohm shunt resistors are required for termination.  
14 DOT96T  
OUT  
Complementary clock of differential 96MHz output. These are current mode outputs and external 33 ohm  
series resistors and 49.9 ohm shunt resistors are required for termination.  
15 DOT96C  
OUT  
16 AVDD96  
PWR 3.3V power for the 48/96MHz PLL and the 96MHz output and logic  
TEST_MODE is a real time input to select between Hi-Z and REF/N divider mode while in test mode. Refer to  
Test Clarification Table.  
17 TEST_MODE  
IN  
CKPWRGD# is an active low input used to sample latched inputs and allow the device to Power Up. PD is an  
18 CKPWRGD#/PD  
19 VDDSRC  
IN  
asynchronous active high input pin used to put the device into a low power state. The internal clocks and PLLs  
are stopped.  
PWR 3.3V power for the SRC outputs and logic  
True clock of differential SRC output. These are current mode outputs. These are current mode outputs and  
external 33 ohm series resistors and 49.9 ohm shunt resistors are required for termination.  
20 SRC0T  
OUT  
Complementary clock of differential SRC output. These are current mode outputs and external 33 ohm  
series resistors and 49.9 ohm shunt resistors are required for termination.  
PWR Ground pin for SRC outputs and logic.  
21 SRC0C  
22 GNDSRC  
23 SRC1C  
OUT  
Complementary clock of differential SRC output. These are current mode outputs and external 33 ohm series  
resistors and 49.9 ohm shunt resistors are required for termination.  
OUT  
True clock of differential SRC output. These are current mode outputs. These are current mode outputs and  
external 33 ohm series resistors and 49.9 ohm shunt resistors are required for termination.  
Complementary clock of differential SRC output. These are current mode outputs and external 33 ohm series  
resistors and 49.9 ohm shunt resistors are required for termination.  
True clock of differential SRC output. These are current mode outputs. These are current mode outputs and  
external 33 ohm series resistors and 49.9 ohm shunt resistors are required for termination.  
24 SRC1T  
25 SRC2C  
26 SRC2T  
OUT  
OUT  
OUT  
27 VDDSRC  
28 AVDD_SRC  
29 GNDSRC  
PWR 3.3V power for the SRC outputs and logic  
PWR 3.3V power for the SRC PLL analog circuits  
PWR Ground pin for SRC outputs and logic.  
This pin establishes the reference current for the differential current-mode output pairs. This pin requires a  
30 IREF  
OUT fixed precision resistor tied to ground in order to establish the appropriate current. 475 ohms is the standard  
value.  
Complementary clock of differential non-spreading SRC output. These are current mode outputs and external  
33 ohm series resistors and 49.9 ohm shunt resistors are required for termination.  
31 NS_SRC0C  
32 NS_SRC0T  
33 NS_SRC1C  
34 NS_SRC1T  
OUT  
True clock of differential non-spreading SRC output. These are current mode outputs. These are current  
mode outputs and external 33 ohm series resistors and 49.9 ohm shunt resistors are required for termination.  
OUT  
Complementary clock of differential non-spreading SRC output. These are current mode outputs and external  
33 ohm series resistors and 49.9 ohm shunt resistors are required for termination.  
OUT  
True clock of differential non-spreading SRC output. These are current mode outputs. These are current  
mode outputs and external 33 ohm series resistors and 49.9 ohm shunt resistors are required for termination.  
OUT  
IDT® PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS  
6
932SQ420D  
REV H 042012  
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