932SQ420D
PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS
Pin Configuration - 64 MLF
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
GNDPCI
VDDPCI
PCI4_2x
PCI3_2x
PCI2_2x
48
1
2
3
4
5
GNDCPU
47 VDDCPU
46
45
CPU1T
CPU1C
44 CPU0T
43
PCI1_2x
6
CPU0C
PCI0_2x
7
42 GNDNS
GNDPCI
VDDPCI
VDD48
^48M_2x/100M_133M#
GND48
8
9
41 AVDD_NS_SAS
40 NS_SAS1T
39 NS_SAS1C
38 NS_SAS0T
37 NS_SAS0C
932SQ420
10
11
12
13
14
15
16
36
GND96
DOT96T
DOT96C
AVDD96
GNDNS
35
VDDNS
34
NS_SRC1T
33
NS_SRC1C
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Note: Pins with ^ prefix have internal 120K pullup
Pins with v prefix have internal 120K pulldowm
IDT® PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS
5
932SQ420D
REV H 042012
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
