ICS1894-40
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
PHYCEIVER
10M Media Independent Interface: Receive Latency
The table below lists the significant time periods for the 10M MII timing. The time periods consist of timings of
signals on the following pins:
• TP_RX (that is, the MII TP_RXP and TP_RXN pins)
• RXCLK
• RXD
The 10M MII Receive Latency Timing Diagram shows the timing diagram for the time periods.
Time
Parameter
Conditions Min. Typ. Max. Units
Period
t1
First Bit of /5/ on TP_RX to /5/D/ on RXD
10M MII
–
6.5
7
Bit times
10M MII Receive Latency Timing Diagram
†
TP_RX
RXCLK
RXD
5
5
5
D
t1
†
Manchester encoding is not shown.
IDT® 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
38
ICS1894-40
REV G 060110
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
