ICS1894-40
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
PHYCEIVER
10M Media Independent Interface: Transmit Latency
The table below lists the significant time periods for the 10M MII transmit latency. The time periods consist of
timings of signals on the following pins:
• TXEN
• TXCLK
• TXD (that is, TXD[3:0])
• TP_TX (that is, TP_TXP and TP_TXN)
The 10M MII Transmit Latency Timing Diagram shows the timing diagram for the time periods.
Time
Parameter
Conditions Min. Typ. Max. Units
Period
t1
TXD Sampled to MDI Output of First Bit
10M MII
–
1.2
2
Bit times
10M MII Transmit Latency Timing Diagram
TXEN
TXCLK
TXD
5
5
5
†
TP_TX
t1
†
Manchester encoding is not shown.
IDT® 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
39
ICS1894-40
REV G 060110
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
