ICS1893AF Data Sheet - Release
Chapter 10 DC and AC Operating Conditions
10.5.6 100M/MII Media Independent Interface: Synchronous Receive Timing
Table 10-13 lists the significant time periods for the MII / 100M Stream Interface synchronous receive
timing. The time periods consist of timings of signals on the following pins:
• RXCLK
• RXD[3:0]
• RXDV
• RXER
Figure 10-7 shows the timing diagram for the time periods.
Table 10-13. MII Interface: Synchronous Receive Timing
Time
Parameter
Min.
Typ.
Max. Units
Period
t1
t2
RXD[3:0], RXDV, and RXER Setup to RXCLK Rise
RXD[3:0], RXDV, and RXER Hold after RXCLK Rise
10.0
10.0
–
–
–
–
ns
ns
Figure 10-7. MII Interface Synchronous Receive Timing Diagram
RXCLK
RXD[3:0]
RXDV
RXER
t1
t2
ICS1893AF, Rev. D 10/26/04
October, 2004
Copyright © 2004, Integrated Circuit Systems, Inc.
All rights reserved.
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