ICS1893AF Data Sheet - Release
Chapter 10 DC and AC Operating Conditions
10.5.5 10M MII: Synchronous Transmit Timing
Table 10-12 lists the significant time periods for the 10M MII synchronous transmit timing. The time periods
consist of timings of signals on the following pins:
• TXCLK
• TXD[3:0]
• TXEN
• TXER
Figure 10-6 shows the timing diagram for the time periods.
Table 10-12. 10M MII: Synchronous Transmit Timing
Time
Parameter
Conditions
Min.
Typ. Max. Units
Period
t1
t2
TXD[3:0], TXEN, TXER Setup to TXCLK Rise
TXD[3:0], TXEN, TXER Hold after TXCLK Rise
–
–
375
0
–
–
–
–
ns
ns
Figure 10-6. 10M MII Synchronous Transmit Timing Diagram
TXCLK
TXD[3:0]
TXEN
TXER
t1
t2
ICS1893AF, Rev D 10/26/04
October, 2004
Copyright © 2004, Integrated Circuit Systems, Inc.
All rights reserved.
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