ICS2059-02
Clock Multiplier and Jitter Attenuator
Recommended PCB Layout
For minimum output clock jitter,
device VDD connections should
be made to common bulk
decoupling device (see text).
G
For minimum output clock jitter,
remove ground and power plane
within this entire area. Also route
all other traces away from this area.
G
G
G
1
2
3
4
5
6
7
8
G
G
G
16
15
14
13
12
11
10
9
G
Legend:
G
= Ground
Connection
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS2059-02. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Supply Voltage, VDD
All Inputs and Outputs
Ambient Operating Temperature
Storage Temperature
Junction Temperature
Soldering Temperature
7V
Rating
-0.5 V to VDD+0.5 V
-40 to +85°C
-65 to +150°C
125°C
260°C
MDS 2059-02 C
7
Revision 031605
Integrated Circuit Systems, Inc.
●
525 Race Street, San Jose, CA 95126
●
tel (408) 297-1201
●
www.icst.com
ICS [ INTEGRATED CIRCUIT SYSTEMS ]
