iC-MN 25-BIT NONIUS ENCODER
WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION
Rev D1, Page 45/59
• Temperature and signal level errors are indicated of the error bit and the NERR pin can be influenced by
directly at the NERR pin. These errors are only S2ERR.
signaled via the error bit if they are active at the
point when data is accepted into the output shift
register.
S2WRN
Addr. 0x43; bit 2
Code
Visibility for warning bit
0
1
Current messages configured to the warning bit
As above, or-gated with latched status messages
which are configured to the warning bit
All errors which occur during operation are stored in
the status register regardless of the configuration of
the error/warning bit (see page 43).
Table 81: Visibility for warning bit
S2ERR
Addr. 0x43; bit 3
Code
Visibility for error bit and NERR
Current messages configured to the error bit
Visibility Of Latched Status Messages
0
1
Parameter S2WRN enables status messages config-
ured to the warning bit using CFGEW and stored in the
status register to be output to the warning bit. In this
instance the warning bit is set until the relevant status
register is read out. Parallel to S2WRN the behavior
As above, or-gated with latched status messages
which are configured to the error bit
Table 82: Visibility for error bit (and NERR pin)
ICHAUS [ IC-HAUS GMBH ]
