iC-MN 25-BIT NONIUS ENCODER
WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION
Rev D1, Page 46/59
MT INTERFACE
In nonius modes iC-MN can connect to an external
ST MSB-1
multiturn sensor via the serial MT interface. Follow-
ing synchronization of the MT data with the ST data
the multiturn period counter is set to its initial position.
ST MSB
Each further revolution is then logged by the internal
period counter.
MT LSB -1
MT LSB
Even when the MT interface is not employed, the in-
ternal 24-bit multiturn period counter can be config-
ured to complement singleturn position data output by
multiturn
data output
a counted multiturn position (see M2S).
MT LSB -1
MT LSB
Additionally, the MT interface can be configured as a
parallel two-pin interface to read in a single bit multi-
turn position accompanied by a synchronization bit. In
this way coverage of the absolute singleturn position
can be doubled if additional sensors provide 180 and
90 degree sector information.
multiturn
data output
+1
+1
MT LSB -1
MT LSB
multiturn
data output
MODE_MT
Code
00*
Addr. 0x40; bit 4:3
Function
-1
-1
°/ST
Multiturn position counted internally
Serial MT interface active (SSI)
10*
Figure 19: Principle of MT synchronization for 1 bit
and 2 bit synchronization signals
11*
Parallel MT interface active (2-bit mode):
Pin MTMA is input for 180° and pin MTSLI input for
90° sector information
Notes
*) NCRC_MT = 0 required
If MODE_MT is altered during operation, command
SOFT_RES must be issued (see page 42).
Table 83: MT Interface operation mode
With a synchronization bit length of two or more bits
iC-MN ignores parameter LNT_MT selecting for lead-
ing or trailing MT data. Synchronization bit lengths of
3 bit or 4 bit enlarge further the synchronization toler-
ance between multiturn and singleturn (see Table 85).
Configuration Of Data Lengths
The bit length of the internal MT counter and of the
multiturn data word is set using parameter DL_MT.
For synchronization purposes the synchronization bit
length must be set by SBL_MT. Synchronization oc-
curs between the external multiturn data read in and
the period information counted internally. At synchro-
nization bit lengths > 1 bit synchronization can occur
automatically within the relevant phase tolerances.
DL_MT
Code
0x00
...
Addr. 0x3E; bit 7:5
Multiturn bit count*
With a single synchronization bit (SBL_MT = 00) no au-
tomatic synchronization can take place. Here, iC-MN
cannot recognize whether the external multiturn sen-
sor provides leading or trailing position data (what may
vary depending on gear box assembly). This must be
set manually by parameter LNT_MT.
8
...
20
24
1
0x0C
0x0D
0x0E
0x0F
Notes
4
*) Does not include synchronization bits of the
external MT sensor.
Figure 19 shows the principle of MT synchronization
for ideal signals (without indication of synchronization
tolerance limits). It shows 2 bit and 1 bit synchroniza-
tion for leading and trailing signals.
Table 84: MT data length (and counter depth)
ICHAUS [ IC-HAUS GMBH ]
