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IC-MDTSSOP20 参数 Datasheet PDF下载

IC-MDTSSOP20图片预览
型号: IC-MDTSSOP20
PDF下载: 下载PDF文件 查看货源
内容描述: 编码器接收器/计数器, SPI和BiSS接口 [ENCODER RECEIVER/COUNTER WITH SPI AND BiSS]
分类和应用: 计数器编码器
文件页数/大小: 23 页 / 451 K
品牌: ICHAUS [ IC-HAUS GMBH ]
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iC-MD RS-422 QUADRATURE  
ENCODER RECEIVER/COUNTER WITH SPI AND BiSS  
Rev A1, Page 18/23  
SPI INTERFACE  
The Serial Peripheral Interface (SPI) of iC-MD consists  
of a SPI slave interface with polarity 0 and phase 0.  
• The rising edge of NCS ends all data transfer and  
resets internal counter and command register  
Each transmission starts with a falling edge of NCS  
and ends with the rising edge. During transmission,  
commands and data are controlled by SCK and NCS  
according to the following rules:  
• Data transfer out from MISO starts with the falling  
edge of SCK immediately after the last bit of the  
SPI command is sampled in on the rising edge  
of SCK  
• Commands and data are shifted; MSB first, LSB  
last  
• Data transfer to MOSI continues immediately af-  
ter receiving the command in all cases where  
data is to be written to iC-MD internal registers  
• Each output data/status bits are shifted out on  
the falling edge of SCK (MISO line) and each bit  
is sampled on the rising edge of SCK (Polarity 0,  
Phase 0).  
SPI Communication  
• After the device is selected with the falling edge The first byte to be transmitted to the iC-MD via SPI is  
of NCS, an 8-bit command is received. The com- the instruction (or command) wich determine the com-  
mand defines the operations to be performed munication direction (read or write), and has the follow-  
(Write/Read) and the address.  
ing structure:  
SPI Commands  
Bit 4 Bit 3  
ADDRESS(6:0)  
Bit 7  
R/W  
Bit 6  
Bit 5  
Bit 2  
Bit 1  
Bit 0  
Table 42: SPI command structure  
The following diagrams show the SPI write and read  
processes.  
Polarity 0, Phase 0  
NCS  
SCLK  
MOSI  
0
ADR(6:0)  
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
X
Byte to write in ADR  
Byte to write in ADR+1  
High Impedance  
MISO  
Figure 6: SPI Write Data  
Polarity 0, Phase 0  
NCS  
SCLK  
MOSI  
MISO  
don't care  
1
ADDRESS(6:0)  
High Impedance  
n
n-1  
n-2  
n-3  
n-4  
n-5  
5
4
3
2
1
0
X
High Impedance  
Figure 7: SPI Read Data  
The data length to be written is always 8 bit, but it is if the NCS signal is not reset and SCLK continues be-  
possible to transmit several bytes of data consecutively ing clocked. The address transmitted is then the start  
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