iC-MD RS-422 QUADRATURE
ENCODER RECEIVER/COUNTER WITH SPI AND BiSS
Rev A1, Page 14/23
TP1, TP2 and AB REGISTERS
TPCFG
Code
00
Addr. 0x01; bit (2:1)
00
TP1, TP2 Registers
Function
The touch probe registers consist of two 24 bit regis-
ters which are load with a TPI pin event (see table 19)
or writing the instruction bit TP (table 24) via SPI/BiSS.
At every TPI pin or TP instruction event, the register
TP2 is load with the value of TP1 and TP1 is load with
the actual value of counter 0.
both edges active
rising edge active
falling edge active
pin TPI disabled
01
10
11
Table 19: TPI Pin Configuration
For using TP registers, AB counter must be configured
to 24 bit, but if 2x24 bit counters are configured, only
the counter 0 will be latched into TP1/TP2 registers.
The following diagram (figure 5) shows the function of
the pin TPI when configured for both rising and falling
edge.
The TPI pin events can be configured as falling, rising
or both edges, as shown in table 19.
Figure 5: Function of TPI pin when TPCFG=11
AB Register
the bit length is set by the configuration bits CNTCFG
A 48 bit register (AB) is used to store and shift out the (table 16)
ABCNT Registers (Counters), and also the "SPI Chan-
nel Data" (SPICH). The register AB is read via BiSS The bit CH0SEL (table 45) selects the data to be load
(sensor data, channel 0) or via SPI (Adr 0x08), and in the AB register when reading the channel 0 via BiSS
or the address 0x08 via SPI.
ICHAUS [ IC-HAUS GMBH ]
