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IBMN312404CT3B-75H 参数 Datasheet PDF下载

IBMN312404CT3B-75H图片预览
型号: IBMN312404CT3B-75H
PDF下载: 下载PDF文件 查看货源
内容描述: [Synchronous DRAM, 32MX4, 5.4ns, CMOS, PDSO54, 0.400 INCH, PLASTIC, TSOP2-54]
分类和应用: 时钟动态存储器光电二极管内存集成电路
文件页数/大小: 66 页 / 2855 K
品牌: IBM [ IBM ]
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IBMN312164CT3  
IBMN312804CT3  
IBMN312404CT3  
Preliminary  
128Mb Synchronous DRAM - Die Revision B  
Auto-Precharge Operation  
Before a new row in an active bank can be opened, the active bank must be precharged using either the Pre-  
charge Command or the auto-precharge function. When a Read or a Write Command is given to the SDRAM,  
the CAS timing accepts one extra address, column address A10, to allow the active bank to automatically  
begin precharge at the earliest possible moment during the burst read or write cycle. If A10 is low when the  
Read or Write Command is issued, then normal Read or Write burst operation is executed and the bank  
remains active at the completion of the burst sequence. If A10 is high when the Read or Write Command is  
issued, then the auto-precharge function is engaged. During auto-precharge, a Read Command will execute  
as normal with the exception that the active bank will begin to precharge before all burst read cycles have  
been completed. Regardless of burst length, the precharge will begin (CAS latency - 1) clocks prior to the last  
data output. Auto-precharge can also be implemented during Write commands.  
A Read or Write Command without auto-precharge can be terminated in the midst of a burst operation. How-  
ever, a Read or Write Command with auto-precharge cannot be interrupted by a command to the same bank.  
Therefore use of a Read, Write, or Precharge Command to the same bank is prohibited during a read or write  
cycle with auto-precharge until the entire burst operation is completed. Once the precharge operation has  
started the bank cannot be reactivated until the Precharge time (t ) has been satisfied.  
RP  
When using the Auto-precharge Command, the interval between the Bank Activate Command and the begin-  
ning of the internal precharge operation must satisfy t  
. If this interval does not satisfy t  
then  
RAS(min)  
RAS(min)  
t
must be extended.  
RCD  
Burst Read with Auto-Precharge  
(Burst Length = 1, CAS Latency = 2, 3)  
T5 T6 T7 T8  
T0  
T1  
T2  
T3  
T4  
CK  
READ A  
NOP  
NOP  
NOP  
NOP  
NOP  
NOP  
NOP  
NOP  
COMMAND  
Auto-Precharge  
t
RP  
CAS latency = 2  
*
tCK2, DQs  
DOUT A  
0
t
RP  
CAS latency = 3  
*
tCK3, DQs  
DOUT A  
0
Bank can be reactivated at completion of tRP  
.
*
Begin Auto-precharge  
tRP is a function of clock cycle time and speed sort.  
See the Clock Frequency and Latency table.  
©IBM Corporation. All rights reserved.  
06K7582.H03335A  
01/01  
Use is further subject to the provisions at the end of this document.  
Page 17 of 66  
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