IBM PowerPRS Q-64G
Preliminary
Packet Routing Switch
Table 3-27. Example of Byte Reordering Using the Look-Up Table
Byte Sequence before Ordering
Look-Up Table Entry Sequence
Byte Sequence after Ordering
Byte 0
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Byte 6
Byte 7
Byte 8
Byte 9
3
4
5
3
4
5
9
8
8
0
Byte 3
Byte 4
Byte 5
Byte 3
Byte 4
Byte 5
Byte 9
Byte 8
Byte 8
Byte 0
3.10 Side Communication Channel
A four-bit side communication channel (SCC) allows communication between the attached devices and the
local processor. SCC information requires minimal PowerPRS Q-64G processing, and is transferred in-band
in the idle packet master LU (in byte 6, bits 0:3 and 4:7).
On the path from the attached devices to the PowerPRS Q-64G, an attached device inserts SCC information
into all ingress idle packets. An attached device can generate an idle packet to guarantee that an information
change is propagated in a minimum amount of time. When the PowerPRS Q-64G receives an idle packet, it
extracts and compares bits 0:3 and 4:7. If the values are identical, an internal register that contains this infor-
mation is refreshed, and the information is made available through the read-only Side Communication
Channel Input Reporting Registers (page 133).
On the path from the PowerPRS Q-64G to the attached devices, the PowerPRS Q-64G inserts SCC informa-
tion from four input pins (SCCIn[0:3]) into all egress idle packets. All output ports send the same SCC infor-
mation. The PowerPRS Q-64G automatically generates an idle packet to all the ports as soon as an edge is
detected on the SCCIn pins to guarantee that the information change is propagated in a minimum period of
time.
3.11 Switchover Support
In redundant switch-plane operation, PowerPRS Q-64G switchover support is provided through a color mech-
anism. This mechanism conducts scheduled switchovers without packet loss. During normal operation, data
packets and idle packets are coded red. Red traffic includes data packets with direct filtering, and link-live-
ness packets with either direct filtering or reverse filtering according to the mask set in the Bitmap Filter
Register (page 125). By setting reverse filtering in the packet protection field, attached devices can send
link-liveness packets to the ports on the backup switch plane (and thereby supervise the backup path). The
PowerPRS Q-64G registers and bits involved in the switchover process are described in Table 3-28 and in
the associated register descriptions in Section 5.
Note: The PowerPRS Q-64G processes the packets used to test link liveness between the ingress and
egress protocol engines as data packets. Event-1 service packets are used to test link liveness between the
PowerPRS Q-64G and the PowerPRS C192.
prsq-64g.01.fm
December 20, 2001
Functional Description
Page 57 of 199
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