IBM PowerPRS Q-64G
Preliminary
Packet Routing Switch
2. Architecture
2.1 System Application
The IBM PowerPRS Q-64G Packet Routing Switch enables the construction of nonblocking scalable switch
fabrics through repeated instances of the same switch element. It is designed for a wide variety of applica-
tions, including campus, wide-area network (WAN) edge, access, and backbone switches. When connected
to the IBM PowerPRS C192 Common Switch Interface, the PowerPRS Q-64G provides a complete redun-
dant switch fabric for the attachment of OC-48 and OC-192 protocol engines. An example of this architecture
is shown in Figure 2-1.
Figure 2-1. System View of the PowerPRS Q-64G with the PowerPRS C192 (configured with redundant
512-Gbps switch planes)
PowerPRS
Q-64Gs
(eight per
plane)
Physical
Layer
Device
Protocol
Engine
(ingress)
PowerPRS
C192
(ingress)
Backplane
Unilink
Optical
Port
0
0
CSIX
ATM, Layer 2,
Layer 3, Layer 4, etc.
Switching Engine
CSIX-to-Unilink
Interface Device
31
31
X Plane
16 Gbps
16 Gbps
Serial Host Interface
Local Processor
Physical
Layer
Device
Protocol
Engine
(egress)
PowerPRS
C192
(egress)
Optical
Port
CSIX
Unilink (eight 2.5-Gbps serial links)
PowerPRS
Q-64Gs
(eight per
plane)
0
0
31
31
Y Plane
16 Gbps
16 Gbps
Serial Host Interface
Local Processor
Unilink (eight 2.5-Gbps serial links)
Switch Core (n × n)
Switch Fabric
prsq-64g.01.fm
Architecture
December 20, 2001
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