IBM3229P2035
Advance
IBM Packet Routing Switch Serial Interface Converter
Figure 35: VDDA Filtering
Ferrite bead
Murata BLM32A06
or Equivalent
Digital Vdd
VDDA
100nF
GND
• VDDA filtering for each PLL
The impedance of the ferrite bead should be much greater than that of the capacitor at frequencies where
noise is expected. Many applications have found that a resistor instead of a ferrite bead does a better job
of reducing jitter. The resistor should be kept to a value lower than 2 Ω . Experimentation is the best way
to determine the optimal filter design for a specific application.
Table 27: Back Pressure Serial Link Signals
Input/Out-
Name
Level
Description
put
Start of transfer of the switch grant information asserted by the converter to
the PE to indicate the position of the start of the overall priority cycle in a
superframe. The superframe is made of as many frames as there are priori-
ties in use. This signal is Hi-Z when the interface is not selected
START_GCXFR
Output
LVCMOS
Contains the information per priority related to the switch output queues 0-7
and 16-23. This signal is Hi-Z when the interface is not selected
ODD_OQG
EVEN_OQG
Output
Output
LVCMOS
LVCMOS
Contains the information per priority related to the switch output queues 8-15
and 24-31. This signal is Hi-Z when the interface is not selected.
Indicate in a frame the relevant priority on the ODD/EVEN OQG serial link
and carry the global shared memory grant. The last bit of each frame carries
the odd parity bit computed on all data bit in the frame. This signal is Hi-Z
when the interface is not selected.
SHARED_GNT
Output
LVCMOS
prssi.02.fm
I/O Definition and Package Pin Assignment
Page 117 of 154
March 1, 2001
IBM [ IBM ]
