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IBM3229P2035 参数 Datasheet PDF下载

IBM3229P2035图片预览
型号: IBM3229P2035
PDF下载: 下载PDF文件 查看货源
内容描述: [Packet Routing Switch, CMOS, CBGA360, 25 X 25 MM, CERAMIC, BGA-360]
分类和应用: 电信电信集成电路
文件页数/大小: 154 页 / 1172 K
品牌: IBM [ IBM ]
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IBM3229P2035  
IBM Packet Routing Switch Serial Interface Converter  
Advance  
Table 23: IBM Packet Routing Switch Serial Interface Converter (the converter) Signals  
Input/Out-  
Name  
Levels  
HSTL  
HSTL  
HSTL  
HSTL  
Description  
put  
DASL_X_TX_0 / DASL_X_TX_0N...  
DASL_X_TX_7 / DASL_X_TX_7N  
Input  
Differential (400 to 500 Mbps) signals for input port from switch X  
Differential (400 to 500 Mbps) signals for output port to switch X  
Differential (400 to 500 Mbps) signals for input port from switch Y  
Differential (400 to 500 Mbps) signals for output port to switch Y  
DASL_X_RX_0 / DASL_X_RX_0N...  
DASL_X_RX_7 / DASL_X_RX_7N  
Output  
Input  
DASL_Y_TX_0 / DASL_Y_TX_0N...  
DASL_Y_TX_7 / DASL_Y_TX_7N  
DASL_Y_RX_0 / DASL_Y_RX_0N...  
DASL_Y_RX_7 / DASL_Y_RX_7N  
Output  
0
1
The switch on switch board X is not allowed to send data to  
the converter  
SEND_GNT_X  
SEND_GNT_Y  
Ouput  
Output  
LVTTL  
LVTTL  
The switch is allowed to send data to the converter. In reset  
mode this signal is forced to Hi-Z.  
0
1
The switch on switch board Y is not allowed to send data to  
the converter  
The switch is allowed to send data to the converter. In reset  
mode this signal is forced to Hi-Z.  
Indicates that the shared memory is not full for a given priority.  
0
The switch on switch board X cannot accept anymore data  
from the converter  
MEM_GNT_X_3... MEM_GNT_X_0  
Input  
LVTTL  
1
The switch can accept more data from the converter  
Indicates that the shared memory is not full for a given priority.  
0
The switch on switch board Y cannot accept anymore data  
from the converter  
MEM_GNT_Y_3... MEM_GNT_Y_0  
DASL_DRV_ENB  
Input  
Input  
LVTTL  
LVTTL  
1
The switch can accept more data from the converter  
Sets DASL drivers in Hi-Z until the board housing the converter is  
fully inserted. Insures that both ends of the adapter board to which  
the converter is soldered are fully inserted. An internal pull-up resis-  
tor forces the inactive state.  
Note: The electrical level supported by the converter lines is called High Speed Transceiver Logic (HSTL). It is specified in JEDEC's  
JESD8-6 standard.  
I/O Definition and Package Pin Assignment  
Page 114 of 154  
prssi.02.fm  
March 1, 2001  
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