IBM3229P2035
IBM Packet Routing Switch Serial Interface Converter
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Table 31: DBG_SELECT Bus Definition
Bits
Reg @8C 7-3
Bits
Description
Reg @8C 15-10
00000
00000
Debug bus not used - DBG_DATA bus is tri-stated.
Data movement monitoring
Bits
15
Description
Switch _Y_FREQOUT bit 1_padout (clockgen island)
Switch_X_FREQOUT bit 0_padout (clockgen island)
14
13-8 Unused
7
6
5
4
3
2
1
0
Egress Packet clock EDI Y (sop_o_TEBUF)
00001
00001
Egress Packet clock EDI X (sop_o_TEBUF)
Ingress Packet clock ISEQ Y (pkt_clk_O_TIBUF)
Ingress Packet clock ISEQ X (pkt_clk_O_TIBUF)
YUMTX: Data packet transmitted indicator at ingress Y switch interface
YUMRX: Data packet received indicator at ingress Y switch interface
XUMTX: Data packet transmitted indicator at ingress X switch interface
XUMRX: Data packet received indicator at ingress X switch interface
M3_debug 0 (16 bits) X
Bits
15
Description
M3 Oscillator (OSC_125 --->OSC_DIV4 with C_Clock)
Reserved
00010
00011
00100
00101
00110
00111
00010
00011
00100
00101
00110
00111
14
13-11 ALU Status Bits (M3_DEBUG0[2:4])
10- 0 Program Counter (M3_DEBUG0[5:15])
M3_debug 0 (16 bits) Y
Bits
15
Description
M3 Oscillator (OSC_125 --->OSC_DIV4 with C_Clock)
Reserved
14
13-11 ALU Status Bits (M3_DEBUG0[2:4])
0-10 Program Counter (M3_DEBUG0[5:15])
IDI to DASL X
Bits
15
Description
C_Clock 125
14
Packet clock ISEQ (Pkt_clk_0_TIBUF)
13-8 Unused
0-7
Parallel_Data_in master LU (DASL_DATA_IN_DEBUG)
IDI to DASL Y
Bits
15
Description
C_Clock 125
14
Packet clock ISEQ (SOP_O_TEBUF)
13-8 Unused
0-7
Parallel_Data_in master LU (DASL_DATA_IN_DEBUG)
DASL to EDI X
Bits
15
Description
C_Clock 125
14
Packet clock ISEQ (Synchro_i_fdasl)
13-8 Unused
0-7
Parallel_Data_Out master LU (DASL_DATA_OUT_DEBUG)
DASL to EDI Y
Bits
15
Description
C_Clock 125
14
Packet clock ISEQ (SOP_0_TEBUF)
13-8 Unused
0-7 Parallel_Data_Out master LU (DASL_DATA_OUT_DEBUG)
I/O Definition and Package Pin Assignment
Page 120 of 154
prssi.02.fm
March 1, 2001
IBM [ IBM ]
