IBM3229P2035
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IBM Packet Routing Switch Serial Interface Converter
Table 22: Processor Interface Signals
Input/
Output
Name
Levels
Description
MP_SEL
MP_WR
Input
LVTTL
LVTTL
LVTTL
LVTTL
IBM Packet Routing Switch Serial Interface converter select for processor access
Write/Read indicator on processor bus
Input
MP_PRDY
MP_INT
Output
Output
Ready signal for transfer complete indication
Interrupt to processor
MP_ADDR_7...
MP_ADDR_0
Inputs
Inputs
LVTTL
LVTTL
LVTTL
Processor bus address
MP_ADD_PRTY
Processor bus parity (optional and can be set through an interface pin)
Processor Data bus
MP_DATA_7...
MP_DATA_0
Input/
Output
Input/
Output
MP_DATA_PRTY
MP_PRTY_ENB
LVTTL
LVTTL
Processor Data bus parity (optional and can be set through an interface pin)
Enable generation of and checking of the microprocessor data and address parity
Input
Input
Enable the operation in either single byte mode access or in byte burst mode com-
patible with I960. When tied to ground, the chip operates in byte mode access,
when tied to 3.3 V it operates in word mode access.
MP_BURST_MODE
LVTTL
prssi.02.fm
I/O Definition and Package Pin Assignment
Page 113 of 154
March 1, 2001
IBM [ IBM ]
