IBM3009K2672
IBM SONET/SDH Framer
Block Diagram and Block Descriptions
High Level Block Diagram
2 x Level 1, or 1 x Level 2, or 1 x Level 2+
UTOPIA Interface
ATM/PPP
Handler
APH
APH
APH
Telecom
Bus
Interface
APS Port
Ring Port
TACC/RACC
DCC
Channel
SFH
SFH
SFH
SONET/SDH Frame Handler
OC-48/
STM-16
Expansion
Port
Microprocessor
Interface
Boundary
Scan
Line Interface Unit 1
LIU2
LIU3
LIU4
622.08 Mb/s 155.52/622.08 Mb/s
155.52 Mb/s 155.52 Mb/s 155.52 Mb/s
Serial Serial Serial
Parallel
Serial
The previous diagram shows the principal blocks of the SONET/SDH framer. These blocks and other func-
tional units are listed below.
• Four LIU blocks.
• Four SFH blocks, which consist of the sub-blocks SDB (SONET/SDH Data Buffer) and transmit/receive
OFP (Overhead Frame Processor). These sub-blocks are not shown in 1:4 Protection with One
SONET/SDH Framer: Normal Operation on page 10.
• Four ATM/PPP Handler (APH) blocks, which consist of the sub-blocks: ACB (ATM Cell / PPP Chunk
Buffer) and ACH (ATM Cell Handler / PPP Handler), which performs HDLC-like encapsulation. These
sub-blocks are not shown in 1:4 Protection with One SONET/SDH Framer: Normal Operation on page 10.
• Transmit/receive APS Cross-Connect (TACC/RACC) block, which is actually a part of the ACH block
within the APH. It is shown separately in the block diagram to illustrate its functional relationship to the
other blocks.
• UTOPIA interface block, which contains the ACI sub-block.
• Transmit/receive Telecom Bus interface block.
• Transmit/receive DCC Port (included in SFH block).
ssframer.01
8/27/99
Block Diagram and Block Descriptions
Page 7 of 279
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