IBM3009K2672
IBM SONET/SDH Framer
Overview
The SONET/SDH framer is a highly integrated SONET/SDH terminator device designed for transmission,
cell, and frame applications. It contains four independent SONET/SDH terminators, which can either termi-
nate ATM/PPP payloads into a UTOPIA Level 2 PHY or Level 2+ interface, or two Level 1 PHY interfaces, or it
can interface the SONET/SDH frames to four Telecom Bus interfaces. It is a 3.3 V device with 5 V tolerant
inputs and outputs for its Non-Line Interface signals. Several other interfaces are provided to facilitate DCC
channel connection to an external HDLC controller, APS, ring operation, and OC-48/STM-16 operation. The
IBM SONET/SDH framer is being provided initially in a 474-pin ceramic ball grid array package, but a plastic
ball grid array package is planned for future manufacture.
The four SONET/SDH terminators can be configured for operation as either:
• Four individual terminators for STM-1 or STS-3c applications.
• A 4:1 MUX/DEMUX for STM-4 or STS-12 applications.
• A single STM-4c or STS-12c terminator.
• An STM-16/STS-48 interface where four SONET/SDH framers are connected in parallel. An external
MUX/DEMUX device is required for this function.
Each SONET/SDH terminator has a Line Interface Unit (LIU) block associated with it that performs clock syn-
thesis and clock recovery for 155.52 Mb/s serial operation. The first LIU block can also perform clock synthe-
sis and clock recovery for 622.08 Mb/s serial operation. When STM-16/OC-48 operation is enabled, the
external MUX/DEMUX is required to perform the clock recovery/synthesis. In this case the 8-bit parallel
SONET/SDH Line interface will be used at 77.76 MHz.
The Line interfaces are connected to corresponding SONET/SDH Frame Handler (SFH) blocks. These
blocks provide the Regenerator Section Overhead (RSOH) and Multiplex Section Overhead (MSOH) func-
tions, i.e. TOH functions. All receive and transmit RSOH, MSOH, and Path Overhead (POH) bytes are stored
in the on-chip RAM from where they can be observed/transmitted and also accessed via the microprocessor
interface. The four SFH blocks can operate independently for STM-1/STS-3c applications or can operate
1
together for STM-4/STS-12 or STM-4c/STS-12c applications. For STM-16/STS-48 applications, an OC-48/
STM-16 Expansion Port is provided for synchronizing operation between multiple SONET/SDH framers. Four
individual interfaces are provided for each DCC svhannel (regenerator or multiplex section) for connection to
an external HDLC controller. The DCC bytes can optionally be inserted via the microprocessor interface. A
Ring Port is provided that is used to communicate Line FEBE and RDI, K1 and K2 bytes plus associated
alarms (and, when ATM or PPP processing is performed, K3 byte and associated indications as well as path
FEBE and RDI information) between SONET/SDH framers. The SFHs can interface to either the external
Telecom Bus interfaces or the ATM/PPP blocks.
The SONET/SDH framer has four individual and independent Telecom Bus interfaces which provide an alter-
native interface to the UTOPIA Level 2+ style interface. The Telecom Bus interface is a byte-wide interface
with control signals for identification of the VC-4 and TOH time slots as well as the location of the J0 and J1
bytes. There is one Telecom Bus interface associated with each SFH. However, as is the case with the SFHs,
the four Telecom Bus interfaces can operate in concert with each other as one 32-bit wide Telecom Bus inter-
face when STM-4c/STS-12c frames are being processed. The SONET/SDH framer is not restricted to ATM or
PPP in “HDLC-like framing” payloads due to the general nature of the Telecom Bus interface. However, when
the Telecom Bus interface is used, the SONET/SDH framer does not provide POH processing. Transmit
retiming is programmable on a per Telecom Bus basis. Receive retiming is not available. For devices where
transmit retiming is not used, a reference clock and frame signal are provided by the SONET/SDH framer to
1. Already for STM-4 operation, the OFPs have to jointly calculate the B1 and perform frame scrambling over the entire frame. STM-4c,
in addition, requires joint B3 calculation, etc.
Overview
ssframer.01
8/27/99
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