Data Sheet
PowerPC 970FX
Preliminary
3.7 Asynchronous Output Specifications
This section describes the asynchronous outputs and bi-directionals. Timing information is not provided
because these signals are launched by the internal processor clock.
Table 3-19, Table 3-20, and Table 3-21 list the signals for the asynchronous outputs and bi-directionals
(BiDi).
Table 3-19. Asynchronous Type Output Signals
Pin
Description
Comment
To service processor
Pin
ATTENTION
QREQ
Attention
Quiesce request
AD12
AB12
N19
Power management
Debug only
TRIGGEROUT
Note: No reference to SYSCLK because this output is launched by the (internal) processor clock.
Table 3-20. Asynchronous Open Drain Output Signals
Pin
Description
I C interface go
Comment
Pin
2
2
I2CGO
Arbitration I C and JTAG
N22
Notes:
The rise/fall times are measured at 20% to 80% of the input signal swing.
No reference to SYSCLK because this output is launched by the (internal) processor clock.
Pull up resistor = TBD
Table 3-21. Asynchronous Open Drain Bidirectional (BiDi) Signals
Pin
Description
Comment
Pin
CHKSTOP
Checkstop signal input/output
R20
Notes:
No reference to SYSCLK because this output is launched by the (internal) processor clock.
Pull up resistor = TBD
Electrical and Thermal Characteristics
Page 32 of 74
October 14, 2005