Table 15: Pinout Listing for the 360 CBGA package (Continued)
Signal Name
Pin Number
Active
I/O
HRESET
B6
Low
Low
High
Input
INT
C11
F8
Input
Input
1
L1_TSTCLK
L2ADDR[0-16]
L17, L18, L19, M19, K18, K17, K15, J19, J18, J17, High
J16, H18, H17, J14, J13, H19, G18
Output
L2AVDD
L13
P17
N15
L16
—
—
L2CE
Low
—
Output
Output
Output
I/O
L2CLKOUTA
L2CLKOUTB
L2DATA[0-63]
—
U14, R13, W14, W15, V15, U15, W16, V16, W17, High
V17, U17, W18, V18, U18, V19, U19, T18, T17,
R19, R18, R17, R15, P19, P18, P13, N14, N13,
N19, N17, M17, M13, M18, H13, G19, G16, G15,
G14, G13, F19, F18, F13, E19, E18, E17, E15,
D19, D18, D17, C18, C17, B19, B18, B17, A18,
A17, A16, B16, C16, A14, A15, C15, B14, C14,
E13
L2DP[0-7]
L2OVDD
V14, U16, T19, N18, H14, F17, C19, B15
High
—
I/O
—
D15, E14, E16, H16, J15, L15, M16, P15, R14,
R16, T15, F15
L2SYNC_IN
L14
M14
F7
—
Input
L2SYNC_OUT
—
Output
Input
1
High
L2_TSTCLK
L2WE
L2ZZ
N16
G17
F9
Low
High
Low
Output
Output
Input
1
LSSD_MODE
MCP
B11
Low
—
Input
—
4
4
NC(No-Connect)
B3, B4, B5, A19, W19, W1, K9, K11 , K19
2
D5, D8, D12, E4, E6, E9, E11, F5, H4, J5, L5, M4,
P5, R4, R6, R9, R11, T5, T8, T12
—
—
OVDD
PLL_CFG[0-3]
QACK
A4, A5, A6, A7
High
Low
Low
Low
Low
Input
B2
J3
Input
QREQ
Output
Output
Input
RSRV
D3
A12
SMI
PPC740 and PPC750 Hardware Specifications
26 of 44
Preliminary and subject to change without notice