Table 14: Pinout Listing for the 255 CBGA Package (Continued)
Signal Name
GBL
Pin Number
Active
I/O
I/O
F01
Low
GND
C05, C12, E03, E06, E08, E09, E11, E14,
F05, F07, F10, F12, G06, G08, G09, G11,
H05, H07, H10, H12, J05, J07, J10, J12,
K06, K08, K09, K11, L05, L07, L10, L12,
M03, M06, M08, M09, M11, M14, P05,
P12
—
—
HRESET
INT
A07
B15
D11
Low
Low
High
Input
Input
Input
1
1
L1_TSTCLK
L2_TSTCLK
D12
B10
C13
High
Low
Input
Input
1
LSSD_MODE
MCP
Low
Input
NC (No-Connect)
B07, B08, C03, C06, C08, D05, D06, H04, J16,
A04, A05, A02, A03, B01, B05
—
—
OVDD
C07, E05, E07, E10, E12, G03, G05, G12,
G14, K03, K05, K12, K14, M05, M07,
M10, M12, P07, P10
—
—
PLL_CFG[0-3]
QACK
QREQ
RSRV
SMI
A08, B09, A09, D09
High
Low
Low
Low
Low
Low
—
Input
Intput
Output
Output
Input
Input
Input
Input
Input
I/O
D03
J03
D01
A16
B14
C09
H14
C02
A14
C11
A11
A12
SRESET
SYSCLK
TA
Low
High
Low
High
High
High
TBEN
TBST
TCK
Input
Input
Output
TDI
TDO
23 of 44
PPC740 and PPC750 Hardware Specifications
Preliminary and subject to change without notice
IBM [ IBM ]
