Figu re Figu re 10 provides th e TRST tim in g diagram .
TRST
5
Figure 10. TRST Timing Diagram
Figu re Figu re 11 provides th e bou n dary-scan tim in g diagram .
TCK
6
7
Data Inputs
Data Outputs
Data Outputs
Input Data Valid
8
9
Output Data Valid
Figure 11. . Boundary-Scan Timing Diagram
Figu re 12 provides th e test access port tim in g diagram .
TCK
10
11
TDI, TMS
Input Data Valid
12
Output Data Valid
TDO
13
9
TDO
Figure 12. Test Access Port Timing Diagram
PPC740 and PPC750 Hardware Specifications
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Preliminary and subject to change without notice