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IBM25CPC945CQ3C-2 参数 Datasheet PDF下载

IBM25CPC945CQ3C-2图片预览
型号: IBM25CPC945CQ3C-2
PDF下载: 下载PDF文件 查看货源
内容描述: [Micro Peripheral IC, CMOS, PBGA1182,]
分类和应用:
文件页数/大小: 69 页 / 1861 K
品牌: IBM [ IBM ]
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Datasheet  
Preliminary  
CPC945 Bridge and Memory Controller  
Table 4-5. Processor Interface 0 Signal Pins  
I/O  
Supply  
Voltage  
Signal  
Levels  
Signal Name  
Signal Description  
Signal Type  
Input  
PI input data from processor 0 or 1 on bus 0. ADO[0:44] repre-  
sents the address, data, and control information which can be bal-  
anced code encoded or 36-bit unencoded signal plus 8-bit parity  
bits. When data is transmitted unencoded, AD[0:35] = data,  
AD[36] = transfer handshake, and AD[37:43] = parity.  
PI0_ADO[0:43]  
1.3 V - 1.5 V  
VDD2  
PI0_SROP[0:1]  
PI0_SRON[0:1]  
Snoop coherency response from the processor 0 or 1 to CPC945  
Complement signals to PI0_SROP[0:1]  
Input  
Input  
1.3 V - 1.5 V  
1.3 V - 1.5 V  
VDD2  
VDD2  
BCLKI is the differential bus clock input from the transmitting  
agent used to strobe incoming data by the receiver. PI0_BCLKOP  
is the positive input from processor 0 or 1 to CPC945.  
PI0_BCLKOP  
PI0_BCLKON  
Input  
Input  
1.3 V - 1.5 V  
1.3 V - 1.5 V  
VDD2  
VDD2  
Negative input of the differential bus clock PI0_BCLKP  
PI output data to processors 0 or 1 on bus 0. ADI[0:44] represents  
the address, data, and control information which can be balanced  
code encoded or 36-bit unencoded signal plus 8-bit parity bits.  
When data transmitted unencoded, ADI[0:35] = data,  
PI0_ADI[0:43]  
Output  
1.3 V - 1.5 V  
VDD2  
ADI[36] = transfer handshake, and ADI[37:43] = parity.  
The snoop response is the accumulated snoop coherency  
response output from CPC945 to processors 0, 1.  
PI0_SRIP[0:1]  
PI0_SRIN[0:1]  
Output  
Output  
1.3 V - 1.5 V  
1.3 V - 1.5 V  
VDD2  
VDD2  
Complementary signals to PI0_SRIP[0:1]  
BCLKI is the differential bus clock from the transmitting agent  
used to strobe incoming data by the receiver. PI_BCLKIP is the  
positive output from CPC945 to processor bus 0.  
PI0_BCLKIP  
PI0_BCLKIN  
Output  
Output  
1.3 V - 1.5 V  
1.3 V - 1.5 V  
VDD2  
VDD2  
The negative output of PI0_BCLKIP to processor bus 0 from  
CPC945  
Note: For the processor interface 0, the driver impedance is controllable to 20 Ω and 40 Ω. The receiver has a 90 Ω termination that  
can be deactivated. See the CPC 945 Bridge and Memory Controller User Manual for more information.  
A15-6009-03  
December 18, 2007 - IBM Confidential  
Dimensions and Pin Information  
Page 39 of 69