Datasheet
Preliminary
CPC945 Bridge and Memory Controller
Table 4-12. JTAG and Test Support Signal Pins (Page 2 of 2)
I/O
Supply
Voltage
Signal
Type
Signal
Levels
Signal Name
Signal Description
The anode of a thermal test diode, which can be used to measure the
junction temperature of the device. Use of the internal thermal diode does
require some precision equipment; therefore, it might only be useful for lab
analysis. These pins have electrostatic discharge (ESD) protection so that
they can be wired out to test points. If a design is not going to use the
diode, this I/O should be grounded. Contact IBM PowerPC application
engineering if additional information is required. See the IBM Cu11_IO
datasheet, cell name THERMALDIO_A cell.
SYS_THDIO_D
Reference
N/A
N/A
N/A
N/A
The cathode of a thermal test diode, which can be used to measure the
junction temperature of the device. Use of the internal thermal diode does
require some precision equipment; therefore, it might only be useful for lab
analysis. These pins have ESD protection so that they can be wired out to Reference
test points. If a design is not going to use the diode, this I/O should be
grounded. Contact IBM PowerPC applications engineering if additional
information is required.
SYS_THDIO_G
JTAG TDI, see the IEEE 1149 spec. It should be tied high during normal
(nontest) operation.
CE1_MC_TDI
OBSV
JTAG
2.5 V
1.8 V
VDD5
VDD4
PLL output observation pin. The output of this pin is the PLL frequency
divided by 8. For example, the PCIe PLL outputs 625 MHz; therefore, the
observable frequency is 78.125 MHz.
Output
JTAG TDO. This is an output for JTAG. This pin should be tied high for
normal (nontest) operation.
TDO
JTAG
Test
2.5 V
2.5 V
VDD5
VDD5
Receiver inhibit test pin input. This pin should be tied high for normal
(nontest) operation.
LSSD_RI
Table 4-13. Power Supply Pins
Signal Name
Signal Description
The motherboard supplies 1.5 V to the core logic through these pins.
Signal Type
Supply
VDD
VDD2
The motherboard supplies 1.3 V - 1.5 V to the processor interface through these pins.
Supply
The motherboard supplies 1.8 V to the DDR2 memory controller interface I/O drivers
through these pins.
VDD3
Supply
VDD4
VDD5
The motherboard supplies 1.2 V to the HyperTransport I/O drivers through these pins.
The motherboard supplies 2.5 V to the I2C and miscellaneous signals through these pins.
Supply
Supply
The motherboard supplies ground to the device through these pins. These grounds are sep-
arate from the PLL analog grounds.
GND
Supply
Table 4-14. Other Signal Pins
Signal
Type
Signal
Levels
I/O Supply
Voltage
Signal Name
Signal Description
This active low signal is activated whenever an exception, pre-
viously enabled through the APIMASK1 register, occurs. See
CPC945 Bridge and Memory Controller User Manual for
details.
CHP_FAULT_N
Output
1.8 V
VDD3
A15-6009-03
December 18, 2007 - IBM Confidential
Dimensions and Pin Information
Page 43 of 69
IBM [ IBM ]
