IBM PowerPC 403GCX
All TOH and TOV timings in Table 18 are specified with respect to the rise of the SysClk input signal. Inter-
nal system clocks are duty-cycle corrected so the falling edge of the external SysClk signal may not be
the same as the falling edge of the internally corrected system clock. TOHxr/TOVxr specifications are for
signals which transition relative to the rising edge of SysClk, while TOHxf/TOVxf apply to falling edge tran-
sitions. Refer to the appropriate timing diagram to determine the appropriate clock edge for signal transi-
tions.
Table 18. 403GCX Synchronous Output Timings
25 MHz
33 MHz
40 MHz
Units
TOVMa
Symbol
Parameter
TOVMa
TOVMa
TOHMin
TOHMin
TOHMin
x
x
x
Output hold, output valid
TOH
TOV
,
TOH1r TOV1r
A6:31
A6:312,3,8
AMuxCAS
BusReq
3
23
3
3
4
24
3
3
3
3
3
23
3
3
3
3
3
23
11
3
11
31
10
11
11
31
10
14
10
11
10
30
10
11
11
11
10
30
21
12
10
11
15
10
12
16
3
18
3
3
4
19
3
3
3
3
3
18
3
3
3
3
3
18
11
3
10
25
9
10
10
25
9
13
9
10
9
3
15.5
3
3
3
15.5
3
3
3
3
3
15.5
3
3
3
3
3
15.5
10
2
10
22.5
9
9
9
21.5
9
12
9
10
9
21.5
9
10
9
10
9
21.5
16.5
10
9
10
13
9
,
TOH1f TOV1f
,
TOH2 TOV2
,
TOH3 TOV3
,
TOH4r TOV4r
CAS0:38
CAS0:32,3
CS0:7
,
TOH4f TOV4f
,
TOH5 TOV5
,
TOH6 TOV6
D0:31
,
TOH7 TOV7
DMAA0:3
DMADXFER
DRAMOE
DRAMOE2,3,8
DRAMWE
Error
,
TOH8 TOV8
,
TOH9r TOV9r
,
TOH9f TOV9f
24
9
,
TOH10 TOV10
,
ns
TOH11 TOV11
10
10
10
10
25
18.5
11
9
10
14
9
11
15
,
TOH12 TOV12
HoldAck
OE
,
TOH13 TOV13
,
TOH14r TOV14r
RAS0:3(turn-off)8
RAS0:3(turn-on)3
RAS0:3(Early,
,
TOH14f TOV14f
,
TOH15 TOV15
,
4
TOH16 TOV16
turn-on)
,
TOH17 TOV17
Reset
R/W
TC0:3
3
3
4
3
3
4
3
3
4
3
3
4
3
3
4
3
3
4
,
TOH18 TOV18
,
TOH19 TOV19
,
TOH20 TOV20
Parity(DMA)5,8
WBE0:3[BE0:3]
XAck
,
TOH21 TOV21
10
14
,
TOH22 TOV22
,
BLast8
30