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IBM041811TLAB-6 参数 Datasheet PDF下载

IBM041811TLAB-6图片预览
型号: IBM041811TLAB-6
PDF下载: 下载PDF文件 查看货源
内容描述: [Standard SRAM, 64KX18, 3ns, CMOS, PBGA119, BGA-119]
分类和应用: 时钟静态存储器内存集成电路
文件页数/大小: 22 页 / 163 K
品牌: IBM [ IBM ]
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Preliminary
IBM041811TLAB
IBM043611TLAB
32K x 36 & 64K x 18 SRAM
Power-Up/ Power-Down Sequencing
The Power supplies need to be powered up in the following manner: V
DD
, V
DDQ
, V
REF
, and Inputs. The
power-down sequencing must be the reverse. V
DDQ
must never be allowed to exceed V
DD
.
Ordering Information
Part Number
IBM041811TLAB - 4
IBM041811TLAB - 4N
IBM041811TLAB - 5
IBM041811TLAB - 6
IBM041811TLAB - 7
IBM043611TLAB - 4
IBM043611TLAB - 4N
IBM043611TLAB - 5
IBM043611TLAB - 6
IBM043611TLAB -7
Organization
64K x 18
64K x 18
64K x 18
64K x 18
64K x 18
32K x 36
32K x 36
32K x 36
32K x 36
32K x 36
Speed
2.1ns Access / 4.0ns Cycle
2.25ns Access / 4.3ns Cycle
2.5ns Access / 5ns Cycle
3.0ns Access / 6ns Cycle
3.0ns Access / 7.0ns Cycle
2.1ns Access / 4.0ns Cycle
2.25ns Access / 4.3ns Cycle
2.5ns Access / 5ns Cycle
3.0ns Access / 6ns Cycle
3.0ns Access / 7.0ns Cycle
Leads
7 x 17 BGA
7 x 17 BGA
7 x 17 BGA
7 x 17 BGA
7 x 17 BGA
7 x 17 BGA
7 x 17 BGA
7 x 17 BGA
7 x 17 BGA
7 x 17 BGA
77H9965.T5
10/98
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
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