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IBM0364804PT3B-360 参数 Datasheet PDF下载

IBM0364804PT3B-360图片预览
型号: IBM0364804PT3B-360
PDF下载: 下载PDF文件 查看货源
内容描述: [Synchronous DRAM, 8MX8, 6ns, CMOS, PDSO54, 0.400 INCH, PLASTIC, TSOP2-54]
分类和应用: 时钟动态存储器光电二极管内存集成电路
文件页数/大小: 72 页 / 1201 K
品牌: IBM [ IBM ]
 浏览型号IBM0364804PT3B-360的Datasheet PDF文件第39页浏览型号IBM0364804PT3B-360的Datasheet PDF文件第40页浏览型号IBM0364804PT3B-360的Datasheet PDF文件第41页浏览型号IBM0364804PT3B-360的Datasheet PDF文件第42页浏览型号IBM0364804PT3B-360的Datasheet PDF文件第44页浏览型号IBM0364804PT3B-360的Datasheet PDF文件第45页浏览型号IBM0364804PT3B-360的Datasheet PDF文件第46页浏览型号IBM0364804PT3B-360的Datasheet PDF文件第47页  
Discontinued (8/99 - last order; 12/99 - last ship)  
IBM0364804 IBM0364164  
IBM0364404 IBM03644B4  
64Mb Synchronous DRAM - Die Revision B  
Common Parameters  
-68  
-260  
Max.  
-360  
-10  
Symbol  
Parameter  
Units Notes  
Min.  
2
Max.  
Min.  
1.8  
Min.  
1.8  
Max.  
Min.  
3
Max.  
tCS  
tCH  
Command Setup Time  
Command Hold Time  
ns  
ns  
1
0.8  
0.8  
1
Address and Bank Select Set-up  
Time  
tAS  
2
1.8  
1.8  
3
ns  
ns  
tAH  
tRCD  
tRC  
Address and Bank Select Hold Time  
RAS to CAS Delay  
1
0.8  
20  
66  
44  
20  
14  
1
0.8  
20  
66  
44  
20  
14  
1
1
20.4  
68  
30  
90  
60  
30  
20  
1
ns  
ns  
1
1
1
1
1
Bank Cycle Time  
tRAS  
tRP  
tRRD  
tCCD  
Active Command Period  
Precharge Time  
47.6  
20.4  
13.6  
1
100000  
100000  
100000  
100000 ns  
ns  
ns  
Bank to Bank Delay Time  
CAS to CAS Delay Time  
CLK  
1. These parameters account for the number of clock cycles and depend on the operating frequency of the clock, as follows:  
the number of clock cycles = specified value of timing / clock period (count fractions as a whole number).  
Mode Register Set Cycle  
-68  
-260  
-360  
-10  
Symbol  
tRSC  
Parameter  
Units Notes  
Min.  
13.6  
Max.  
Min.  
14  
Max.  
Min.  
14  
Max.  
Min.  
20  
Max.  
Mode Register Set Cycle Time  
ns  
1
1. These parameters account for the number of clock cycles and depend on the operating frequency of the clock, as follows:  
the number of clock cycles = specified value of timing / clock period (count fractions as a whole number).  
Read Cycle  
-68  
-260  
-360  
-10  
Symbol  
Parameter  
Units Notes  
Min.  
2.5  
3
Max.  
6
Min.  
2.5  
3
Max.  
6
Min.  
2.5  
3
Max.  
6
Min.  
3
Max.  
7
ns  
ns  
1
2
tOH  
Data Out Hold Time  
3
tLZ  
Data Out to Low Impedance Time  
Data Out to High Impedance Time  
Data Out to High Impedance Time  
DQM Data Out Disable Latency  
0
0
0
0
ns  
tHZ3  
tHZ2  
tDQZ  
3
3
3
3
ns  
3
3
3
6
3
6
3
8
3
8
ns  
2
2
2
2
CLK  
1. AC Output Load Circuit A.  
2. AC Output Load Circuit B.  
3. Referenced to the time at which the output achieves the open circuit condition, not to output voltage levels.  
©IBM Corporation. All rights reserved.  
Use is further subject to the provisions at the end of this document.  
19L3264.E35855A  
1/28/99  
 
 
 
 
 
 
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