IBM0316809C IBM0316409C
IBM0316169C
16Mbit Synchronous DRAM
Operating Currents (T = 0 to +70˚C, V = 3.3V ± 0.3V)
A
DD
Organization
X8
CAS
Latency
Speed
Sort
tRC(min)
Symbol
Parameter
Test Condition
Units Notes
X4
85
X16
90
tRC = ∞
tCK=30 ns
-10
-11
-12
-13
-10
-11
-12
-13
-10
-11
-12
-13
85
80
tRC = ∞
tCK=33 ns
80
85
CL=1
CL=2
CL=3
mA
tRC = ∞
tCK=36 ns
80
80
85
tRC = ∞
tCK=39 ns
75
75
80
tRC = ∞
tCK=15 ns
130
120
115
110
175
160
150
140
130
120
115
110
175
160
150
145
140
130
120
115
190
175
165
155
Operating Current
1-N Rule
tRC = ∞
tCK=16.5 ns
tRC = Infinity
(Continuous
ICC10
t
CK ≥ tCK(min)
mA
1, 2
Read/Write cycles
with new column
address registered
each clock cycle)
tRC = ∞
tCK=18 ns
IO = 0mA
tRC = ∞
tCK=19.5 ns
tRC = ∞
tCK=10 ns
tRC = ∞
tCK=11 ns
mA
tRC = ∞
tCK=12 ns
tRC = ∞
tCK=13 ns
1. The specified values are obtained with the output open.
2. The specified values are valid when addresses and DQ’s are changed no more than once during tCK(min).
3. The specified values are obtained when the programmed burst length is executed to completion without interruption by a subse-
quent burst Read or Write cycle.
©IBM Corporation, 1996. All rights reserved.
Use is further subject to the provisions at the end of this document.
07H3997
SA14-4711-02
Revised 05/96
Page 34 of 100
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