IBM0316809C IBM0316409C
IBM0316169C
16Mbit Synchronous DRAM
Method 1: CAS latency = 1 or 2, Burst Length = Any
When the CAS latency is 1 or 2, the minimum interval between the Read and Write commands is one clock
cycle.
Minimum Read to Write Interval: Burst Length = 4, CAS latency = 1, 2
T0
T1
T2
T3
T4
T5
T6
T7
T8
CLK
DQM
1 Clk Interval
READ A
BANK A
ACTIVATE
NOP
NOP
WRITE A
NOP
NOP
NOP
NOP
COMMAND
CAS latency = 1
DIN A
DIN A
DIN A
DIN A
DIN A
DIN A
DIN A
DIN A
0
0
1
1
2
2
3
3
t
CK1, DQ’s
Must be Hi-Z before
the Write Command
CAS latency = 2
t
CK2, DQ’s
: “H” or “L”
Non-minimum Read to Write Interval: Burst Length = 4, CAS latency = 1, 2
T0
T1
T2
T3
T4
T5
T6
T7
T8
CLK
DQM
NOP
READ A
NOP
NOP
NOP
WRITE B
NOP
NOP
NOP
COMMAND
CAS latency = 1
DOUT A
DOUT A
DOUT A
DIN B
DIN B
DIN B
DIN B
DIN B
DIN B
DIN B
DIN B
0
1
0
0
1
1
2
2
3
3
t
CK1, DQ’s
Must be Hi-Z before
the Write Command
CAS latency = 2
0
t
CK2, DQ’s
: “H” or “L”
©IBM Corporation, 1996. All rights reserved.
Use is further subject to the provisions at the end of this document.
07H3997
SA14-4711-02
Revised 05/96
Page 14 of 100
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