APCPCWM_4828539:WP_0000001WP_0000001
1
H27(U_S)4G8_6F2D
4 Gbit (512M x 8 bit) NAND Flash
Serial Access Cycle after Read (EDO Tꢂpe, CLE=L, WE=H, ALE=L)
tCR
CE
RE
tRC
tCHZ
tCOH
tRP
tREH
tRHZ
tREA
tREA
tRLOH
tRHOH
IOx
R/B
Dout
Dout
tRR
NOTES: Transition is measured at ±±22mꢀ ꢁrom steadꢂ state ꢃoꢄtaꢅe ꢆitꢇ ꢄoadꢈ
Tꢇis parameter is sampꢄed and not 122% testedꢈ
tRLOH is ꢃaꢄid ꢆꢇen ꢁrequencꢂ is ꢇiꢅꢇer tꢇan 33MHzꢈ
tRHOH starts to ꢃaꢄid ꢆꢇen ꢁrequencꢂ is ꢄoꢆer tꢇan 33MHzꢈ
Figure 9: Sequential Out Cycle after Read
Status Read Cycle & EDC Status Read Cycle
t
CLR
CLE
tCLS
t
t
CLH
t
CS
CE
CH
t
WP
WE
t
CEA
t
CHZ
t
COH
t
WHR
RE
t
DH
t
RHZ
t
REA
t
DS
t
IR
t
RHOH
IOx
70h or 7Bh
Status Output
Figure 10: Status / EDC Read Cycle
Rev 1.4 / OCT. 2010
37
B34416/177.179.157.84/2010-10-08 10:08
*ba53f20d-240c*
HYNIX [ HYNIX SEMICONDUCTOR ]
