GMS81C5108
10.3 Power Saving Operation
GMS81C5108 has 2 power-saving mode. In power-saving
mode, power consumption is reduced considerably that in
Battery operation Battery life can be extended a lot.
It is released by RESET or interrupt. To be released by in-
terrupt, interrupt should be enabled before Sleep mode.
Sleep mode is entered by setting bit 0 of Sleep Mode Reg-
ister (SMR), and STOP Mode is entered by STOP instruc-
tion.
ADDRESS : 0DE
H
RESET VALUE : -------0
Sleep Mode Register
B
-
-
-
-
-
-
-
SMR
SLEEP Mode
0: Release Sleep Mode
1: Enter Sleep Mode
In this mode, the internal oscillation circuits remain active.
Oscillation continues and peripherals are operate normally
but CPU stops. Movement of all Peripherals is shown in
Table 10-1. Sleep mode is entered by setting bit 0 of SMR
(address 0DEH).
Figure 10-5 SLEEP Mode Register
Oscillator
(X or SX pin)
IN
IN
Internal CPU Clock
Interrupt
Release
Set bit 0 of SMR
Normal Operation
Stand-by Mode
Normal Operation
Figure 10-6 Sleep Mode Release Timing by External Interrupt
.
Oscillator
(X or SX pin)
IN
IN
Internal CPU Clock
RESET
Release
Set bit 0 of SMR
BIT Counter
1
2
0
FE
0
1
2
FF
Clear & Start
Normal Operation
Stand-by Mode
t
= 62.5ms
Normal Operation
ST
at 4.19MHz by hardware
1
t
=
x 256
ST
f
÷1024
MAIN
Figure 10-7 SLEEP Mode Release Timing by RESET pin
JUNE 2001 Ver 1.0
39
HYNIX [ HYNIX SEMICONDUCTOR ]
