HT48RA0-2/HT48CA0-2
higher-order byte to TBLH (08H). Only the destination
of the lower-order byte in the table is well-defined, the
other bits of the table word are transferred to the lower
portion of TBLH, the remaining 2 bits are read as ²0².
The Table Higher-order byte register (TBLH) is read
only. The table pointer (TBLP) is a read/write register
(07H), where P indicates the table location. Before ac-
cessing the table, the location must be placed in
TBLP. The TBLH is read only and cannot be restored.
All table related instructions need 2 cycles to complete
the operation. These areas may function as normal
program memory depending upon the requirements.
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0
0
0
0
0
0
0
0
0
0
0
1
2
3
4
5
6
7
8
9
H
H
H
H
H
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M
P
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P
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B
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A
T
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0
0
A
B
H
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0
0
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H
H
Stack Register - STACK
0
E
H
This is a special part of the memory used to save the
contents of the program counter (PC) only. The stack is
organized into one level and is neither part of the data
nor part of the program space, and is neither readable
nor writeable. The activated level is indexed by the stack
pointer (SP) and is neither readable nor writeable. At a
subroutine call the contents of the program counter are
pushed onto the stack. At the end of a subroutine sig-
naled by a return instruction (RET), the program counter
is restored to its previous value from the stack. After a
chip reset, the SP will point to the top of the stack.
0
F
H
1
1
1
1
1
1
1
1
1
1
0
1
2
3
4
5
6
7
8
9
H
H
H
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P
P
A
B
P
C
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1
1
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B
H
H
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"
0
0
"
If the stack is full and a ²CALL² is subsequently exe-
cuted, stack overflow occurs and the first entry will be
lost (only the most recent return address is stored).
1
1
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H
H
1
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1
F
H
H
2
0
Data Memory - RAM
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The data memory is designed with 42´8 bits. The data
memory is divided into two functional groups: special
function registers and general purpose data memory
(32´8). Most of them are read/write, but some are read
only.
(
3
2
B
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)
3
F
H
RAM Mapping
The special function registers include the indirect ad-
dressing register (00H), the memory pointer register
(MP;01H), the accumulator (ACC;05H) the program
counter lower-order byte register (PCL;06H), the table
pointer (TBLP;07H), the table higher-order byte register
(TBLH;08H), the status register (STATUS;0AH) and the
I/O registers (PA;12H, PB;14H, PC;16H). The remaining
space before the 20H is reserved for future expanded
usage and reading these locations will return the result
00H. The general purpose data memory, addressed
from 20H to 3FH, is used for data and control informa-
tion under instruction command.
Indirect Addressing Register
Location 00H is an indirect addressing register that is
not physically implemented. Any read/write operation of
[00H] accesses data memory pointed to by MP (01H).
Reading location 00H itself indirectly will return the re-
sult 00H. Writing indirectly results in no operation.
The memory pointer register MP (01H) is a 6-bit register.
The bit 7~6 of MP is undefined and reading will return
the result ²1². Any writing operation to MP will only trans-
fer the lower 6-bit data to MP.
All data memory areas can handle arithmetic, logic, in-
crement, decrement and rotate operations directly. Ex-
cept for some dedicated bits, each bit in the data
memory can be set and reset by the SET [m].i and CLR
[m].i instructions, respectively. They are also indirectly
accessible through memory pointer register (MP;01H).
Accumulator
The accumulator closely relates to ALU operations. It is
also mapped to location 05H of the data memory and is
capable of carrying out immediate data operations. Data
movement between two data memory locations has to
pass through the accumulator.
Rev. 1.50
5
July 23, 2004
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
