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HT48CA0-2 参数 Datasheet PDF下载

HT48CA0-2图片预览
型号: HT48CA0-2
PDF下载: 下载PDF文件 查看货源
内容描述: 遥控型8位MCU [Remote Type 8-Bit MCU]
分类和应用: 微控制器和处理器外围集成电路遥控LTE
文件页数/大小: 32 页 / 235 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
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HT48RA0-2/HT48CA0-2  
Oscillator Configuration  
Arithmetic and Logic Unit - ALU  
There are two oscillator circuits implemented in the  
microcontroller.  
This circuit performs 8-bit arithmetic and logic operation.  
The ALU provides the following functions.  
·
·
·
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Arithmetic operations (ADD, ADC, SUB, SBC, DAA)  
Logic operations (AND, OR, XOR, CPL)  
Rotation (RL, RR, RLC, RRC)  
O
S
C
1
O
S
C
1
Increment and Decrement (INC, DEC)  
Branch decision (SZ, SNZ, SIZ, SDZ ....)  
O
S
C
2
O
S
C
2
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The ALU not only saves the results of a data operation but  
also changes the contents of the status register.  
System Oscillator  
Status Register - STATUS  
Both are designed for system clocks; the RC oscillator  
and the Crystal oscillator, which are determined by code  
options. No matter what oscillator type is selected, the  
signal provides the system clock. The HALT mode stops  
the system oscillator and ignores the external signal to  
conserve power.  
This 8-bit status register (0AH) contains the zero flag  
(Z), carry flag (C), auxiliary carry flag (AC), overflow flag  
(OV), power down flag (PDF) and watchdog time-out  
flag (TO). It also records the status information and con-  
trols the operation sequence.  
If an RC oscillator is used, an external resistor between  
OSC1 and VSS in needed and the resistance must  
range from 51kW to 1MW. The system clock, divided by  
4, is available on OSC2, which can be used to synchro-  
nize external logic. The RC oscillator provides the most  
cost effective solution. However, the frequency of the  
oscillation may vary with VDD, temperature and the chip  
itself due to process variations. It is, therefore, not suit-  
able for timing sensitive operations where accurate os-  
cillator frequency is desired.  
With the exception of the TO and PDF flags, bits in the  
status register can be altered by instructions like most  
other register. Any data written into the status register  
will not change the TO or PDF flags. In addition it should  
be noted that operations related to the status register  
may give different results from those intended. The TO  
and PDF flags can only be changed by the Watchdog  
Timer overflow, chip power-up, clearing the Watchdog  
Timer and executing the HALT instruction.  
The Z, OV, AC and C flags generally reflect the status of  
the latest operations.  
If the Crystal oscillator is used, a crystal across OSC1  
and OSC2 is needed to provide the feedback and phase  
shift for the oscillator. No other external components are  
needed. Instead of a crystal, the resonator can also be  
connected between OSC1 and OSC2 to get a frequency  
reference, but two external capacitors in OSC1 and  
OSC2 are required.  
In addition, on executing the subroutine call, the status  
register will not be automatically pushed onto the stack.  
If the contents of the status are important and if the sub-  
routine can corrupt the status register, precautions must  
be taken to save it properly.  
Labels  
Bits  
Function  
C is set if the operation results in a carry during an addition operation or if a borrow does not  
take place during a subtraction operation; otherwise C is cleared. C is also affected by a rotate  
through carry instruction.  
C
0
AC is set if the operation results in a carry out of the low nibbles in addition or no borrow from  
the high nibble into the low nibble in subtraction; otherwise AC is cleared.  
AC  
Z
1
2
3
Z is set if the result of an arithmetic or logic operation is zero; otherwise Z is cleared.  
OV is set if the operation results in a carry into the highest-order bit but not a carry out of the  
highest-order bit, or vice versa; otherwise OV is cleared.  
OV  
PDF is cleared when either a system power-up or executing the CLR WDT instruction. PDF is  
set by executing the HALT instruction.  
PDF  
4
TO is cleared by a system power-up or executing the CLR WDT or HALT instruction. TO is set  
by a WDT time-out.  
TO  
5
6~7  
¾
Unused bit, read as ²0²  
Status Register  
Rev. 1.50  
6
July 23, 2004  
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