HT48RA0-2/HT48CA0-2
Reset
V
D
D
There are three ways in which a reset can occur:
R
E
S
t
S S T
·
·
·
RES reset during normal operation
RES reset during HALT
S
S
T
T
i
m
e
-
o
u
t
WDT time-out reset during normal operation
C
h
i
p
R
e
s
e
t
Some registers remain unchanged during reset condi-
tions. Most registers are reset to the ²initial condition²
when the reset conditions are met. By examining the
PDF and TO flags, the program can distinguish between
different ²chip resets².
Reset Timing Chart
V
D
D
R
E
S
TO PDF
RESET Conditions
RES reset during power-up
0
u
0
1
0
u
1
u
RES reset during normal operation
RES wake-up HALT
Reset Circuit
WDT time-out during normal operation
H
A
L
T
W
D
T
Note: ²u² means unchanged.
W
D
T
T
i
m
e
-
o
u
t
R
e
s
e
t
To guarantee that the system oscillator has started and
stabilized, the SST (System Start-up Timer) provides an
extra-delay of 1024 system clock pulses when the sys-
tem powers up or when the system awakes from a HALT
state.
R
e
s
e
t
R
E
S
S
S
T
O
S
C
1
1
0
-
s
t
a
g
e
R
i
p
p
l
e
C
o
u
n
t
e
r
When a system power up occurs, an SST delay is added
during the reset period. But when the reset comes from
the RES pin, the SST delay is disabled. Any wake-up
from HALT will enable the SST delay.
P
o
w
e
r
-
o
n
D
e
t
e
c
t
i
o
n
Reset Configuration
The functional unit chip reset status is shown below.
PC
000H
WDT Prescaler
Input/Output ports
SP
Clear
Input mode
Points to the top of the stack
Low level
Carrier output
The chip reset status of the registers is summarized in the following table:
Reset
WDT Time-out
RES Reset
RES Reset
WDT Time-out
(HALT)*
Register
(Power On) (Normal Operation) (Normal Operation)
(HALT)
Program Counter
000H
000H
000H
000H
000H
MP
-xxx xxxx
xxxx xxxx
xxxx xxxx
--xx xxxx
--00 xxxx
1111 1111
0011 1111
---- ---1
-uuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
--1u uuuu
1111 1111
0011 1111
---- ---1
-uuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
--uu uuuu
1111 1111
0011 1111
---- ---1
-uuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
--01 uuuu
1111 1111
0011 1111
---- ---1
-uuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
--11 uuuu
uuuu uuuu
uuuu uuuu
---- ---u
ACC
TBLP
TBLH
STATUS
PA
PB
PC
Note:
²u² means unchanged
²x² means unknown
Rev. 1.50
8
July 23, 2004
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
